Patents by Inventor Masayuki Ozasa

Masayuki Ozasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8779750
    Abstract: A reference voltage generating circuit includes: a reference voltage generating circuit element including a first diode characteristic element and a second diode characteristic element, a density of a current flowing through the second diode characteristic element being different from a density of a current flowing through the first diode characteristic element, the reference voltage generating circuit element being configured to output a reference voltage generated based on a difference between voltages respectively applied to the first diode characteristic element and the second diode characteristic element; a first adjusting circuit element configured to adjust a first-order temperature coefficient of the reference voltage; and a second adjusting circuit element configured to adjust a second-order temperature coefficient of the reference voltage.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: July 15, 2014
    Assignee: Panasonic Corporation
    Inventors: Masayuki Ozasa, Fumihito Inakai
  • Publication number: 20130241526
    Abstract: The present invention provides a reference voltage generating circuit capable of improving a temperature dependence characteristic by a simple configuration. The reference voltage generating circuit includes: a reference voltage generating circuit element including a first diode characteristic element and a second diode characteristic element, a density of a current flowing through the second diode characteristic element being different from a density of a current flowing through the first diode characteristic element, the reference voltage generating circuit element being configured to output a reference voltage generated based on a difference between voltages respectively applied to the first diode characteristic element and the second diode characteristic element; a first adjusting circuit element configured to adjust a first-order temperature coefficient of the reference voltage; and a second adjusting circuit element configured to adjust a second-order temperature coefficient of the reference voltage.
    Type: Application
    Filed: February 27, 2013
    Publication date: September 19, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Masayuki OZASA, Fumihito INUKAI
  • Publication number: 20110095813
    Abstract: A MOS transistor including a first MOS transistor M1 to be used as a resistor; an input voltage source 1 connected to the source of the first MOS transistor for applying an input voltage Vin; and a gate voltage source 6 connected to the gate of the first MOS transistor for applying a gate voltage Vg. The gate voltage Vg and the input voltage Vin are set within a range where a gate-source voltage and source-drain voltage of the first MOS transistor cause the first MOS transistor to operate in a non-saturation region and also are set to avoid the first MOS transistor operating in an operation region with leakage current. Fluctuations of the resistance value resulting from a change in leakage current due to manufacturing variations are reduced and favorable temperature characteristics are obtained.
    Type: Application
    Filed: December 30, 2010
    Publication date: April 28, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masayuki OZASA, Shigeo MASAI, Hitoshi KOBAYASHI, Shuya YAMASAKI
  • Patent number: 7405636
    Abstract: Four input nodes I1-I4 for inputting 4-phase signals, four resistors R1-R4, four capacitors C1-C4, and four output nodes O1-O4 for outputting 4-phase signals are provided. The resistors and the capacitors are connected alternately in a loop, and the input nodes and output nodes are connected alternately to the respective nodes between the resistors and the capacitors sequentially. Each of the four resistors is composed of a group of three or more partial resistors, and three groups of the partial resistors R2a-R2c, R3a-R3c and R4a-R4c are collected respectively and arranged in the same attitude, while the partial resistors R1a-R1c of the remaining group are distributed into the other groups and arranged in the same line the same attitude as the partial resistors of each of the other groups. The regions of the thus collected groups are arranged in one direction.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: July 29, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Akio Yokoyama, Manabu Ookubo, Takao Soramoto
  • Patent number: 7362142
    Abstract: A current source apparatus includes a first MOS transistor having a drain serving as current input terminals with the gate connected to the drain, a first switch connected to the source of the first MOS transistor, a second MOS transistor having a drain serving as a current output terminal, a second switch connected to the source of the second MOS transistor, a third switch having one end connected to the gate of the first MOS transistor, and the other end connected to the gate of the second MOS transistor, and a drive circuit which controls the second switch and the third switch.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: April 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Manabu Ohkubo
  • Patent number: 7271652
    Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: September 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Akio Yokoyama
  • Publication number: 20070182487
    Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).
    Type: Application
    Filed: April 5, 2007
    Publication date: August 9, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Akio Yokoyama
  • Publication number: 20070129041
    Abstract: An intermediate-frequency signal from a frequency mixer is subjected to channel selection by a band-pass filter. Then an output signal from the band-pass filter is subjected to analog-to-digital conversion by an analog-to-digital converter on a predetermined sampling frequency. An anti-aliasing filter is provided at a stage previous to the analog-to-digital converter. The anti-aliasing filter includes notch filters and attenuates signals with frequencies which are higher and lower than a frequency which is an integral multiple of the sampling frequency by the intermediate frequency.
    Type: Application
    Filed: November 29, 2006
    Publication date: June 7, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Akio Yokoyama, Manabu Ookubo, Masayuki Ozasa, Takao Soramoto
  • Patent number: 7215195
    Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: May 8, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Akio Yokoyama
  • Publication number: 20070001761
    Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).
    Type: Application
    Filed: September 12, 2006
    Publication date: January 4, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Akio Yokoyama
  • Publication number: 20060262230
    Abstract: The receiver IF system or the signal selection device of the present invention includes: frequency converters that obtain polyphase intermediate-frequency signals for suppressing an image component of an RF signal from an input signal; a polyphase filter for removing an image component from the polyphase intermediate-frequency signals; and a band-pass filter composed of an N-pass filter for selecting a channel of an intermediate-frequency signal that is obtained by removing an image component from an output of the polyphase filter. An image rejection filter and a channel selection filter can be integrated at low cost with higher performance, and an area of a substrate for reception can be reduced.
    Type: Application
    Filed: May 10, 2006
    Publication date: November 23, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Manabu Ookubo, Akio Yokoyama, Masayuki Ozasa, Takao Soramoto
  • Publication number: 20060244551
    Abstract: Four input nodes I1-I4 for inputting 4-phase signals, four resistors R1-R4, four capacitors C1-C4, and four output nodes O1-O4 for outputting 4-phase signals are provided. The resistors and the capacitors are connected alternately in a loop, and the input nodes and output nodes are connected alternately to the respective nodes between the resistors and the capacitors sequentially. Each of the four resistors is composed of a group of three or more partial resistors, and three groups of the partial resistors R2a-R2c, R3a-R3c and R4a-R4c are collected respectively and arranged in the same attitude, while the partial resistors R1a-R1c of the remaining group are distributed into the other groups and arranged in the same line the same attitude as the partial resistors of each of the other groups. The regions of the thus collected groups are arranged in one direction.
    Type: Application
    Filed: April 24, 2006
    Publication date: November 2, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masayuki Ozasa, Akio Yokoyama, Manabu Ookubo, Takao Soramoto
  • Patent number: 7116170
    Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: October 3, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Akio Yokoyama
  • Patent number: 7064696
    Abstract: A first current mirror circuit that operates at the time of a rise in a first signal is connected to a current source, a second current mirror circuit that operates at the time of a rise in the first signal is connected to the first current mirror circuit, and a third current mirror circuit that operates at the time of a rise in a second signal is respectively connected to the current source and the point of connection between the first current mirror circuit and the second current mirror circuit. A pulse generation circuit for generating first and second signals from an external signal is provided. The second signal rises in sync with the first signal, and falls before the first signal.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: June 20, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Manabu Ohkubo, Masayuki Ozasa
  • Patent number: 7053695
    Abstract: There is provided a current source circuit in which a outflow current of an output terminal is equal to an inflow current thereof. The current source circuit includes a first transistor group converting a reference current from a reference current source into a voltage and a first transistor having a current mirror relationship with the first transistor group, and allowing an output current to flow therethrough. An error amplifier compares a voltage generated in the first transistor group and supplied to one input terminal with a voltage supplied to the other input terminal. A second transistor is driven with an output voltage of the error amplifier. A third transistor is driven with the output voltage of the error amplifier, and allows an output current to flow therethrough in a direction opposite to the output current of the first transistor with respect to an output terminal.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: May 30, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Hiroyasu Shimaoka
  • Patent number: 7046077
    Abstract: There is provided a current source circuit in which a outflow current of an output terminal is equal to an inflow current thereof. The current source circuit includes a first transistor group converting a reference current from a reference current source into a voltage and a first transistor having a current mirror relationship with the first transistor group, and allowing an output current to flow therethrough. An error amplifier compares a voltage generated in the first transistor group and supplied to one input terminal with a voltage supplied to the other input terminal. A second transistor is driven with an output voltage of the error amplifier. A third transistor is driven with the output voltage of the error amplifier, and allows an output current to flow therethrough in a direction opposite to the output current of the first transistor with respect to an output terminal.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: May 16, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Hiroyasu Shimaoka
  • Publication number: 20050225381
    Abstract: There is provided a current source circuit in which a outflow current of an output terminal is equal to an inflow current thereof. The current source circuit includes a first transistor group converting a reference current from a reference current source into a voltage and a first transistor having a current mirror relationship with the first transistor group, and allowing an output current to flow therethrough. An error amplifier compares a voltage generated in the first transistor group and supplied to one input terminal with a voltage supplied to the other input terminal. A second transistor is driven with an output voltage of the error amplifier. A third transistor is driven with the output voltage of the error amplifier, and allows an output current to flow therethrough in a direction opposite to the output current of the first transistor with respect to an output terminal.
    Type: Application
    Filed: June 8, 2005
    Publication date: October 13, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Hiroyasu Shimaoka
  • Publication number: 20050174099
    Abstract: A first current mirror circuit that operates at the time of a rise in a first signal is connected to a current source, a second current mirror circuit that operates at the time of a rise in the first signal is connected to the first current mirror circuit, and a third current mirror circuit that operates at the time of a rise in a second signal is respectively connected to the current source and the point of connection between the first current mirror circuit and the second current mirror circuit. A pulse generation circuit for generating first and second signals from an external signal is provided. The second signal rises in sync with the first signal, and falls before the first signal.
    Type: Application
    Filed: December 23, 2004
    Publication date: August 11, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Manabu Ohkubo, Masayuki Ozasa
  • Publication number: 20050151587
    Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).
    Type: Application
    Filed: October 8, 2003
    Publication date: July 14, 2005
    Inventors: Masayuki Ozasa, Akio Yokoyama
  • Publication number: 20050134366
    Abstract: There is provided a current source circuit in which a outflow current of an output terminal is equal to an inflow current thereof. The current source circuit includes a first transistor group converting a reference current from a reference current source into a voltage and a first transistor having a current mirror relationship with the first transistor group, and allowing an output current to flow therethrough. An error amplifier compares a voltage generated in the first transistor group and supplied to one input terminal with a voltage supplied to the other input terminal. A second transistor is driven with an output voltage of the error amplifier. A third transistor is driven with the output voltage of the error amplifier, and allows an output current to flow therethrough in a direction opposite to the output current of the first transistor with respect to an output terminal.
    Type: Application
    Filed: February 10, 2005
    Publication date: June 23, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Ozasa, Hiroyasu Shimaoka