Patents by Inventor Masayuki Takase

Masayuki Takase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10497739
    Abstract: An image capture device includes pixels and a signal line that is arranged across two or more of the pixels. Each pixel includes: a semiconductor substrate, a photoelectric converter including a first electrode, a second electrode, and a photoelectric conversion layer; a first transistor including first and second impurity regions in the substrate; a wiring layer between the substrate and the second electrode; and a capacitor arranged between the wiring layer and the substrate in a normal direction of the substrate and including a third electrode, a fourth electrode between the third electrode and the substrate, and a dielectric layer. The first impurity region is electrically connected to the second electrode, the fourth electrode is electrically connected to one of the first and second impurity regions, and at least either the third or fourth electrodes covers the first impurity region when viewed along the normal direction.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: December 3, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masayuki Takase, Yuuko Tomekawa, Yoshihiro Sato
  • Patent number: 10453980
    Abstract: A photodetection device includes: a photoelectric converter generating charge; a first channel having first and second ends, the first end being connected to the photoelectric converter, charge being transferred from the first end toward the second end; a second channel diverging from the first channel at a first position of the first channel; a third channel diverging from the first channel at a second position of the first channel; a first accumulator accumulating charge transferred from the first channel through the second channel; a second accumulator accumulating charge transferred from the first channel through the third channel; and at least one first gate electrode switching between transfer/cutoff of charge in the second channel, and switching between transfer/cutoff of charge in the third channel, a width of the first channel at the first end being greater than a width of the first channel at the second end in a plan view.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: October 22, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Sanshiro Shishido, Masayuki Takase
  • Publication number: 20190273880
    Abstract: An imaging device includes a semiconductor layer including an impurity region of a first conductivity type, a photoelectric converter electrically connected to the impurity region, and a transistor having a gate of a second conductivity type different from the first conductivity type, a source and a drain, the transistor including the impurity region as one of the source and the drain, the gate being electrically connected to the impurity region.
    Type: Application
    Filed: May 13, 2019
    Publication date: September 5, 2019
    Inventors: Junji HIRASE, Yoshihiro SATO, Yoshinori TAKAMI, Masayuki TAKASE, Masashi MURAKAMI
  • Patent number: 10367108
    Abstract: A photodetection device includes: a photoelectric converter generating charge; a first transfer channel having first and second ends, the first end being connected to the photoelectric converter, charge from the photoelectric converter being transferred from the first end toward the second end; a second transfer channel diverging from the first transfer channel at a first position; a third transfer channel diverging from the first transfer channel at a second position, further than the first position from the first end; a first charge accumulator accumulating charge transferred through the second transfer channel; a second charge accumulator accumulating charge transferred through the third transfer channel; a first gate electrode switching between transfer/cutoff of charge in the first transfer channel; and at least one second gate electrode switching between transfer/cutoff of charge in the second and third transfer channels, the third transfer channel being wider than the second transfer channel.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: July 30, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masayuki Takase, Sanshiro Shishido
  • Patent number: 10341591
    Abstract: An imaging device includes a semiconductor layer and a pixel cell. The pixel cell includes an impurity region of a first conductivity type, the impurity region located in the semiconductor layer, a photoelectric converter electrically connected to the impurity region and located above the semiconductor layer, a first transistor having a first gate, a first source and a first drain, one of the first source and the first drain electrically connected to the impurity region, a second transistor having a second gate of a second conductivity type different from the first conductivity type, a second source and a second drain, the second transistor including the impurity region as one of the second source and the second drain, the second gate electrically connected to the impurity region, and a third transistor having a third gate, a third source and a third drain, the third gate electrically connected to the photoelectric converter.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: July 2, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Hirase, Yoshihiro Sato, Yoshinori Takami, Masayuki Takase, Masashi Murakami
  • Publication number: 20190181178
    Abstract: An image capture device includes pixels and a signal line that is arranged across two or more of the pixels. Each pixel includes: a semiconductor substrate, a photoelectric converter including a first electrode, a second electrode, and a photoelectric conversion layer; a first transistor including first and second impurity regions in the substrate; a wiring layer between the substrate and the second electrode; and a capacitor arranged between the wiring layer and the substrate in a normal direction of the substrate and including a third electrode, a fourth electrode between the third electrode and the substrate, and a dielectric layer. The first impurity region is electrically connected to the second electrode, the fourth electrode is electrically connected to one of the first and second impurity regions, and at least either the third or fourth electrodes covers the first impurity region when viewed along the normal direction.
    Type: Application
    Filed: October 29, 2018
    Publication date: June 13, 2019
    Inventors: MASAYUKI TAKASE, YUUKO TOMEKAWA, YOSHIHIRO SATO
  • Publication number: 20190051684
    Abstract: An imaging device includes a pixel comprising a photoelectric conversion layer having a first surface and a second surface opposite to the first surface; a pixel electrode on the first surface; an auxiliary electrode on the first surface, the auxiliary electrode being spaced from the pixel electrode; an upper electrode on the second surface, the upper electrode facing the pixel electrode and the auxiliary electrode; and an amplification transistor having a gate coupled to the pixel electrode. The imaging device also includes voltage application circuitry that generates a first voltage and a second voltage different from the first voltage, the voltage application circuitry being coupled to the auxiliary electrode. The voltage application circuitry selectively supplies either the first voltage or the second voltage to the auxiliary electrode.
    Type: Application
    Filed: October 18, 2018
    Publication date: February 14, 2019
    Inventors: Masayuki TAKASE, Takayoshi YAMADA, Tokuhiko TAMAKI
  • Patent number: 10193998
    Abstract: To enable a communication apparatus, which transmits and receives data with a partially reconfigurable logic circuit, to configure a module while continuing a communication process. A communication apparatus transmits and receives data and includes a partially reconfigurable logic circuit and a management unit for managing a circuit configuration of the logic circuit. The logic circuit includes a plurality of modules and a data distribution unit. The management unit fixedly arranges a plurality of coupling interfaces, which are used for sending data to a module determined as a distribution destination of data by the data distribution unit and which are respectively linkable to the plurality of modules, at prescribed positions on the logic circuit, and creates the module in the partially reconfigurable area of the logic circuit so as to be linked to any of the plurality of coupling interfaces.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: January 29, 2019
    Assignee: HITACHI, LTD.
    Inventors: Taisuke Ueta, Masayuki Takase, Jun Sugawa, Yasunari Shinohara
  • Publication number: 20190006542
    Abstract: A photodetection device includes: a photoelectric converter generating charge; a first channel having first and second ends, the first end being connected to the photoelectric converter, charge being transferred from the first end toward the second end; a second channel diverging from the first channel at a first position of the first channel; a third channel diverging from the first channel at a second position of the first channel; a first accumulator accumulating charge transferred from the first channel through the second channel; a second accumulator accumulating charge transferred from the first channel through the third channel; and at least one first gate electrode switching between transfer/cutoff of charge in the second channel, and switching between transfer/cutoff of charge in the third channel, a width of the first channel at the first end being greater than a width of the first channel at the second end in a plan view.
    Type: Application
    Filed: June 5, 2018
    Publication date: January 3, 2019
    Inventors: SANSHIRO SHISHIDO, MASAYUKI TAKASE
  • Publication number: 20190006543
    Abstract: A photodetection device includes: a photoelectric converter generating charge; a first transfer channel having first and second ends, the first end being connected to the photoelectric converter, charge from the photoelectric converter being transferred from the first end toward the second end; a second transfer channel diverging from the first transfer channel at a first position; a third transfer channel diverging from the first transfer channel at a second position, further than the first position from the first end; a first charge accumulator accumulating charge transferred through the second transfer channel; a second charge accumulator accumulating charge transferred through the third transfer channel; a first gate electrode switching between transfer/cutoff of charge in the first transfer channel; and at least one second gate electrode switching between transfer/cutoff of charge in the second and third transfer channels, the third transfer channel being wider than the second transfer channel.
    Type: Application
    Filed: June 6, 2018
    Publication date: January 3, 2019
    Inventors: MASAYUKI TAKASE, SANSHIRO SHISHIDO
  • Publication number: 20190006402
    Abstract: A photodetection device includes: a photoelectric converter generating charge; a first diffusion region having a first end connected to the photoelectric converter and a second end and extending in a first direction from the first end toward the second end; a second diffusion region having a third end connected to a first side surface, of the first diffusion region, which is along the first direction and a fourth end and extending in a second direction from the third end toward the fourth end; a first charge accumulator connected to the fourth end; a first gate electrode covering at least part of the first diffusion region; and a second gate electrode covering at least part of the second diffusion region. The second gate electrode covers a first portion of the first diffusion region without the first gate electrode intervention. The first portion is adjacent to the second diffusion region.
    Type: Application
    Filed: June 12, 2018
    Publication date: January 3, 2019
    Inventors: MASAYUKI TAKASE, SANSHIRO SHISHIDO
  • Patent number: 10141354
    Abstract: An imaging device, comprising: at least one unit pixel cell; and a voltage application circuit that generates at least two different voltages, each of the at least one unit pixel cell comprising: a photoelectric conversion layer having a first surface and a second surface being on a side opposite to the first surface, a pixel electrode located on the first surface, an auxiliary electrode located on the first surface, the auxiliary electrode being separated from the pixel electrode and electrically connected to the voltage application circuit, an upper electrode located on the second surface, the upper electrode opposing to the pixel electrode and the auxiliary electrode, a charge storage node electrically connected to the pixel electrode, and a charge detection circuit electrically connected to the charge storage node.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: November 27, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masayuki Takase, Takayoshi Yamada, Tokuhiko Tamaki
  • Patent number: 10142570
    Abstract: An imaging device including at least one pixel, where each of the at least one pixels includes a photoelectric conversion layer having a first surface and a second surface being on a side opposite to the first surface; a first electrode located on the first surface; a second electrode located on the first surface, the second electrode being separated from the first electrode, a first voltage being applied to the second electrode; a third electrode located on the second surface, the third electrode opposing to the first electrode and the second electrode, a second voltage being applied to the third electrode; and an amplifier transistor having a gate electrically connected to the first electrode, where an absolute value of a difference between the first voltage and the second voltage is larger than an absolute value of a difference between the second voltage and a voltage of the first electrode.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: November 27, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takayoshi Yamada, Masayuki Takase, Tokuhiko Tamaki, Masashi Murakami
  • Publication number: 20180332244
    Abstract: An imaging device including at least one pixel, where each of the at least one pixels includes a photoelectric conversion layer having a first surface and a second surface being on a side opposite to the first surface; a first electrode located on the first surface; a second electrode located on the first surface, the second electrode being separated from the first electrode, a first voltage being applied to the second electrode; a third electrode located on the second surface, the third electrode opposing to the first electrode and the second electrode, a second voltage being applied to the third electrode; and an amplifier transistor having a gate electrically connected to the first electrode, where an absolute value of a difference between the first voltage and the second voltage is larger than an absolute value of a difference between the second voltage and a voltage of the first electrode.
    Type: Application
    Filed: July 20, 2018
    Publication date: November 15, 2018
    Inventors: Takayoshi YAMADA, Masayuki TAKASE, Tokuhiko TAMAKI, Masashi MURAKAMI
  • Patent number: 10057518
    Abstract: An imaging device comprises at least one unit pixel cell. Each of them comprises: a photoelectric conversion layer having a first and second surfaces; a pixel electrode and a shield electrode located on the first surface and separated from each other, a shield voltage being applied to the shield electrode; an upper electrode located on the second surface and opposing to the pixel electrode and the shield electrode, a counter voltage being applied to the upper electrode; a charge accumulation node electrically connected to the pixel electrode; and a charge detection circuit electrically connected to the charge accumulation node. An absolute value of a difference between the shield voltage and the counter voltage is larger than an absolute value of a difference between the counter voltage and a voltage of the pixel electrode.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: August 21, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takayoshi Yamada, Masayuki Takase, Tokuhiko Tamaki, Masashi Murakami
  • Patent number: 9992136
    Abstract: A communication device includes a plurality of packet processing modules in which a packet processing function is changeable with a program, and a management server holds program information of a plurality of different packet processing module circuits settable to the packet processing modules, selects the packet processing module circuit to be set to the packet processing module, of the plurality of different packet processing module circuits, and transmits the program information of the selected packet processing module circuit and information for identifying the packet processing module that is an object to be set, to the communication device that is an object to be set.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: June 5, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Takase, Taisuke Ueta, Masanobu Kobayashi, Ryousuke Nishino
  • Publication number: 20170264840
    Abstract: An imaging device includes a semiconductor layer and a pixel cell. The pixel cell includes an impurity region of a first conductivity type, the impurity region located in the semiconductor layer, a photoelectric converter electrically connected to the impurity region and located above the semiconductor layer, a first transistor having a first gate, a first source and a first drain, one of the first source and the first drain electrically connected to the impurity region, a second transistor having a second gate of a second conductivity type different from the first conductivity type, a second source and a second drain, the second transistor including the impurity region as one of the second source and the second drain, the second gate electrically connected to the impurity region, and a third transistor having a third gate, a third source and a third drain, the third gate electrically connected to the photoelectric converter.
    Type: Application
    Filed: March 1, 2017
    Publication date: September 14, 2017
    Inventors: JUNJI HIRASE, YOSHIHIRO SATO, YOSHINORI TAKAMI, MASAYUKI TAKASE, MASASHI MURAKAMI
  • Publication number: 20170257259
    Abstract: To reduce a load of an inspection process on a server apparatus . A computer system includes a server apparatus, a gateway apparatus, and a plurality of devices coupled to the gateway apparatus. The gateway apparatus retains a range of a normal value of a device, calculated based on device information, for the plurality of devices, and when device information related to a certain device is not included in a range of a normal value of the device, notifies the server apparatus of the fact that an anomaly with respect to the device has been detected. When the server apparatus receives from the gateway apparatus a notification of the fact that an anomaly has been detected, the server apparatus inspects device information related to the device in which the anomaly had been detected.
    Type: Application
    Filed: October 28, 2016
    Publication date: September 7, 2017
    Inventors: Nodoka MIMURA, Masashi YANO, Masayuki TAKASE, Taisuke UETA
  • Publication number: 20170237828
    Abstract: To enable a communication apparatus, which transmits and receives data with a partially reconfigurable logic circuit, to configure a module while continuing a communication process. A communication apparatus transmits and receives data and includes a partially reconfigurable logic circuit and a management unit for managing a circuit configuration of the logic circuit. The logic circuit includes a plurality of modules and a data distribution unit. The management unit fixedly arranges a plurality of coupling interfaces, which are used for sending data to a module determined as a distribution destination of data by the data distribution unit and which are respectively linkable to the plurality of modules, at prescribed positions on the logic circuit, and creates the module in the partially reconfigurable area of the logic circuit so as to be linked to any of the plurality of coupling interfaces.
    Type: Application
    Filed: November 9, 2016
    Publication date: August 17, 2017
    Applicant: HITACHI, LTD.
    Inventors: Taisuke UETA, Masayuki TAKASE, Jun SUGAWA, Yasunari SHINOHARA
  • Publication number: 20170150073
    Abstract: An imaging device comprises at least one unit pixel cell. Each of them comprises: a photoelectric conversion layer having a first and second surfaces; a pixel electrode and a shield electrode located on the first surface and separated from each other, a shield voltage being applied to the shield electrode; an upper electrode located on the second surface and opposing to the pixel electrode and the shield electrode, a counter voltage being applied to the upper electrode; a charge accumulation node electrically connected to the pixel electrode; and a charge detection circuit electrically connected to the charge accumulation node. An absolute value of a difference between the shield voltage and the counter voltage is larger than an absolute value of a difference between the counter voltage and a voltage of the pixel electrode.
    Type: Application
    Filed: February 2, 2017
    Publication date: May 25, 2017
    Inventors: Takayoshi YAMADA, Masayuki TAKASE, Tokuhiko TAMAKI, Masashi MURAKAMI