Patents by Inventor Masayuki Takase

Masayuki Takase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9602743
    Abstract: An imaging device comprises at least one unit pixel cell. Each of them comprises: a photoelectric conversion layer having a first and second surfaces; a pixel electrode and a shield electrode located on the first surface and separated from each other, a shield voltage being applied to the shield electrode; an upper electrode located on the second surface and opposing to the pixel electrode and the shield electrode, a counter voltage being applied to the upper electrode; a charge accumulation node electrically connected to the pixel electrode; and a charge detection circuit electrically connected to the charge accumulation node. The charge detection circuit includes a reset transistor that sets the pixel electrode at an initialization voltage at predetermined timing. An absolute value of a difference between the shield voltage and the counter voltage is larger than an absolute value of a difference between the initialization voltage and the counter voltage.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: March 21, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takayoshi Yamada, Masayuki Takase, Tokuhiko Tamaki, Masashi Murakami
  • Publication number: 20170070573
    Abstract: A data processing device includes: an FPGA that includes a plurality of core circuits to which a data processing function is settable through a program file, and processes input data through the core circuits; an FPGA circuit file storage unit that stores the program file; and a control unit that sets the data processing function to the core circuits. In the data processing device, a request including information specifying the data processing function to be set and the core circuit is transmitted to a file management server, the data processing function is set based on a program file received in response to the request, and the received program file is stored in the FPGA circuit file storage unit.
    Type: Application
    Filed: June 23, 2016
    Publication date: March 9, 2017
    Applicant: HITACHI, LTD.
    Inventors: Masayuki TAKASE, Taisuke UETA, Yuji OISHI, Yasunari SHINOHARA
  • Patent number: 9478760
    Abstract: A solid-state imaging device according to an aspect of the present disclosure includes pixel including: a first and second electrode located in a same layer, the second electrode being located between the first electrode and the other first electrodes included in adjacent pixels; an organic photoelectric conversion film including a first surface and a second surface, the first surface being in contact with the first electrode and the second electrode; and a counter electrode located on the second surface. The organic photoelectric conversion film extends over the pixels. The first electrode is an electrode through which electrons or holes generated in the organic photoelectric conversion film are extracted. An area ratio of the first electrode to the each pixel is 25% or less. And a total area ratio of a sum of the first electrode and the second electrode to the each pixel is 40% or greater.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: October 25, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tokuhiko Tamaki, Masayuki Takase, Yasuhiko Adachi
  • Patent number: 9402040
    Abstract: A solid-state imaging device has a plurality of imaging-purpose pixels and a plurality of focus detection-purpose pixels. Each of the imaging-purpose pixels are provided with a first lower electrode, a photoelectric conversion film formed on the first lower electrode, and an upper electrode formed on the photoelectric conversion film. Each of the focus detection-purpose pixels is provided with a second lower electrode, the photoelectric conversion film formed on the second lower electrode, and the upper electrode formed on the photoelectric conversion film. The area of the second lower electrode is smaller than the area of the first lower electrodes. The second lower electrode is provided on a position deviating from a pixel center of a corresponding focus detection-pixel, and two second lower electrodes corresponding to two focus detection purpose pixels included in the plurality of focus detection purpose pixels is arranged in mutually opposite directions.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: July 26, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masayuki Takase, Yoshihiro Sato, Junji Hirase, Tokuhiko Tamaki
  • Patent number: 9385944
    Abstract: When a communication path between a user site and a dual-homed data center is made redundant, a communication between the user site and a server within a data center can be continued. An edge node DCE-1 of a data center 40-1 and edge nodes TPE-1, TPE-2 of a transport network are connected to each other by a link TPE-1-1 and a link TPE-2-1, respectively. The edge nodes TPE-3 and TPE-1, TPE-2 that hold a node AE51 of a user site 50 are set with an LSP 110 of an active system, and an LSP 120 of a backup system, respectively. One of the links is active, and the other link is backup, and the LSP of the TPE node having the active link in the LSP 100 and the LSP 120 is made active. The respective links are prioritized, and the links are switched to an active state in order from the links higher in the order of priority when a link failure or an LSP failure occurs.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: July 5, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Takase, Hideki Endo, Yoshihiro Ashi, Taisuke Ueta
  • Publication number: 20160119563
    Abstract: An imaging device comprises at least one unit pixel cell. Each of them comprises: a photoelectric conversion layer having a first and second surfaces; a pixel electrode and a shield electrode located on the first surface and separated from each other, a shield voltage being applied to the shield electrode; an upper electrode located on the second surface and opposing to the pixel electrode and the shield electrode, a counter voltage being applied to the upper electrode; a charge accumulation node electrically connected to the pixel electrode; and a charge detection circuit electrically connected to the charge accumulation node. The charge detection circuit includes a reset transistor that sets the pixel electrode at an initialization voltage at predetermined timing. An absolute value of a difference between the shield voltage and the counter voltage is larger than an absolute value of a difference between the initialization voltage and the counter voltage.
    Type: Application
    Filed: October 8, 2015
    Publication date: April 28, 2016
    Inventors: TAKAYOSHI YAMADA, MASAYUKI TAKASE, TOKUHIKO TAMAKI, MASASHI MURAKAMI
  • Publication number: 20160119562
    Abstract: An imaging device, comprising: at least one unit pixel cell; and a voltage application circuit that generates at least two different voltages, each of the at least one unit pixel cell comprising: a photoelectric conversion layer having a first surface and a second surface being on a side opposite to the first surface, a pixel electrode located on the first surface, an auxiliary electrode located on the first surface, the auxiliary electrode being separated from the pixel electrode and electrically connected to the voltage application circuit, an upper electrode located on the second surface, the upper electrode opposing to the pixel electrode and the auxiliary electrode, a charge storage node electrically connected to the pixel electrode, and a charge detection circuit electrically connected to the charge storage node.
    Type: Application
    Filed: October 6, 2015
    Publication date: April 28, 2016
    Inventors: MASAYUKI TAKASE, TAKAYOSHI YAMADA, TOKUHIKO TAMAKI
  • Publication number: 20160006675
    Abstract: A communication device includes a plurality of packet processing modules in which a packet processing function is changeable with a program, and a management server holds program information of a plurality of different packet processing module circuits settable to the packet processing modules, selects the packet processing module circuit to be set to the packet processing module, of the plurality of different packet processing module circuits, and transmits the program information of the selected packet processing module circuit and information for identifying the packet processing module that is an object to be set, to the communication device that is an object to be set.
    Type: Application
    Filed: June 8, 2015
    Publication date: January 7, 2016
    Inventors: Masayuki TAKASE, Taisuke UETA, Masanobu KOBAYASHI, Ryousuke NISHINO
  • Publication number: 20150280155
    Abstract: A solid-state imaging device according to an aspect of the present disclosure includes pixel including: a first and second electrode located in a same layer, the second electrode being located between the first electrode and the other first electrodes included in adjacent pixels; an organic photoelectric conversion film including a first surface and a second surface, the first surface being in contact with the first electrode and the second electrode; and a counter electrode located on the second surface. The organic photoelectric conversion film extends over the pixels. The first electrode is an electrode through which electrons or holes generated in the organic photoelectric conversion film are extracted. An area ratio of the first electrode to the each pixel is 25% or less. And a total area ratio of a sum of the first electrode and the second electrode to the each pixel is 40% or greater.
    Type: Application
    Filed: March 25, 2015
    Publication date: October 1, 2015
    Inventors: TOKUHIKO TAMAKI, MASAYUKI TAKASE, YASUHIKO ADACHI
  • Patent number: 9137158
    Abstract: In an exemplary communication apparatus, an assignment module determines whether processing for a second packet assigned the flow ID associated with a received first packet is being executed. The assignment module determines a parallel processing module to execute processing for the first packet and a parameter to be included in a notice of assignment. The determined parallel processing module acquires a result of execution of the processing for the second packet from the computation table or the result of execution of the processing held in the parallel processing module according to the received notice of assignment. The determined parallel processing module executes the processing for the first packet using the result of execution of the processing for the second packet and the information included in the notice of assignment, and updates a computation table with a result of execution of the processing for the first packet.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: September 15, 2015
    Assignee: HITACHI, LTD.
    Inventors: Taisuke Ueta, Hayato Hoshihara, Masayuki Takase, Akihiko Tsuchiya, Yusuke Yajima
  • Patent number: 9106523
    Abstract: Provided is a communication device including a plurality of physical ports, the communication device holding information for associating each of at least one logical port and at least two physical ports, the communication device being configured to: identify, when any one of the plurality of physical ports receives data including user data, one of the at least one logical port as an output destination of the data based on destination information included in the received data; select, based on the data, one of the at least two physical ports associated with the identified logical port as an destination of the data; generate coupling check data relating to one of the plurality of physical ports; transmit the coupling check data from the one of the plurality of physical ports; and transmit data including the user data from the physical port selected by a first processing unit as the output destination.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: August 11, 2015
    Assignee: HITACHI, LTD.
    Inventors: Masayuki Takase, Tetsuya Uda, Takayuki Kanno, Kenji Fujihira
  • Patent number: 9094330
    Abstract: An example of a data transport system includes transport nodes of a transport network, communication devices which communicate via the transport network, and a transport network logical path management server for setting logical paths between the transport nodes within the transport network, and a logical path control server. In a case where a first communication device is newly connected with a first transport node, the first communication device transmits control data to a logical path control server via the first transport node. The logical path control server obtains information about a connection relation between the newly connected first communication device and the first transport node from the control data, and establishes a logical path between the first communication device and a second communication device based on the obtained information about the connection relation and on information about logical paths between transport nodes in a logical path database.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: July 28, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Takase, Masahiro Kimura, Kazuhiro Kusama
  • Publication number: 20150195466
    Abstract: A solid-state imaging device has a plurality of imaging-purpose pixels and a plurality of focus detection-purpose pixels. Each of the imaging-purpose pixels are provided with a first lower electrode, a photoelectric conversion film formed on the first lower electrode, and an upper electrode formed on the photoelectric conversion film. Each of the focus detection-purpose pixels is provided with a second lower electrode, the photoelectric conversion film formed on the second lower electrode, and the upper electrode formed on the photoelectric conversion film. The area of the second lower electrode is smaller than the area of the first lower electrodes. The second lower electrode is provided on a position deviating from a pixel center of a corresponding focus detection-pixel, and two second lower electrodes corresponding to two focus detection purpose pixels included in the plurality of focus detection purpose pixels is arranged in mutually opposite directions.
    Type: Application
    Filed: March 23, 2015
    Publication date: July 9, 2015
    Inventors: MASAYUKI TAKASE, YOSHIHIRO SATO, JUNJI HIRASE, TOKUHIKO TAMAKI
  • Patent number: 9065862
    Abstract: A communication device includes a flow identification unit specifying a user corresponding to received data, a bandwidth control unit controlling transmission of the received data so as not to exceed a bandwidth corresponding to the selected communication path in two bandwidths allocated to the specified user, and a label addition unit adding the label value corresponding to the selected communication path to the data received from the bandwidth control unit and transmitting the data. The label addition unit executes, upon detecting a trigger for a change in the selection of the communication path, changing the selection of the label value and transmitting a feedback signal for giving notice of the change in the selection of the communication path to the bandwidth control unit in a given order. The bandwidth control unit executes a process of changing the setup of the bandwidth on the basis of the received feedback signal.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: June 23, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Takase, Akihiko Tsuchiya, Taisuke Ueta, Yusuke Yajima, Hayato Hoshihara
  • Publication number: 20150146649
    Abstract: A communication apparatus includes: a table set group comprising a plurality of table sets each containing a plurality of 1RD/1WR-configuration tables; a latest access holding table for specifying, for each flow, one of the table sets as the latest access destination of the each flow; and an updating unit for selecting, when a reference made to the latest access destination holding table with respect to a plurality of simultaneously received write requests shows that access destinations of flows indicated by the respective write requests are the same table set, a different table set for each of the flows indicated by the respective write requests, executing write processing in each table of the selected table set, and updating the latest access holding table so that the access destinations after the write processing are registered as access destinations of the flows indicated by the respective write requests.
    Type: Application
    Filed: November 24, 2014
    Publication date: May 28, 2015
    Inventors: Taisuke UETA, Hideki ENDO, Masayuki TAKASE, Yusuke YAJIMA, Masanobu KOBAYASHI
  • Patent number: 9030928
    Abstract: In an example of the invention, network devices are classified into areas. Each of the areas includes edge nodes. A network management apparatus retains fault information including values each indicating whether or not a fault has occurred in each of the areas, retains detour path information including values indicating edge nodes, values indicating alternative areas to the areas and priorities assigned to the alternative areas, identifies, when determined that a fault has occurred in a first area based on the fault information, an alternative area to the first area based on the detour path information, determines, when determined that the fault has not occurred in the identified alternative area, the identified alternative area as a second area through which the active path passes, determines two edge nodes included in the second area, and detect network devices through which the active path passes between the two edge nodes.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: May 12, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Fujihira, Masayuki Takase, Tetsuya Uda
  • Patent number: 8948201
    Abstract: A packet transfer apparatus connects two networks of different protocols. The packet transfer apparatus, connected to a first communication network and a second communication network, performs the steps of: storing first destination correspondence information; receiving a packet of the first communication protocol; based on the first destination correspondence information, determining destination information of a packet of the second communication protocol corresponding to destination information of the received packet of the first communication protocol; generating the header of the packet of the second communication protocol, based on the determined destination information of the packet of the second communication protocol; converting the received one or more packets of the first communication protocol into one or more packets of the third communication protocol; and adding the generated header of the packet of the second communication protocol to the packets of the third communication protocol.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: February 3, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Takase, Hideki Endo, Takayuki Kanno, Akihiko Tanaka, Yoshihiro Ashi, Nobuyuki Yamamoto
  • Publication number: 20150009810
    Abstract: A communication system couples a first communication network including a data transfer apparatus and a second communication network including a router to each other. The first communication network is constructed by centralized control by the network control computer. The second communication network is constructed by autonomous distributed control by using a protocol on an IP layer of the router. The router transmits protocol data requiring protocol processing on the IP layer to the data transfer apparatus. The data transfer apparatus transfers the protocol data from the router to the protocol processing computer. The protocol processing computer being configured to: carry out, when receiving the protocol data, the protocol processing on the IP layer for the received protocol data; and hold identification information on an interface included in the data transfer apparatus for transferring the protocol data to the protocol processing computer.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 8, 2015
    Applicant: HITACHI, LTD.
    Inventors: Takeshi SHIBATA, Masayuki TAKASE, Masahiro KIMURA
  • Patent number: 8886913
    Abstract: An identifier management apparatus capable of setting identifier conversion information of a new user without affecting identifier conversion processings of other users, and an identifier management method. The identifier management apparatus converts an identifier given to communication data. Its memory stores multiple hash functions, output values of the hash functions corresponding to the respective plurality of hash functions, multiple entry tables that manage the identifier conversion information indicating a correspondence between the input identifier being an input value of the hash function and an output identifier obtained by converting the input identifier, and a management table for managing a setting status of the identifier conversion information in each entry table.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: November 11, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Fujihira, Yoshihiro Ashi, Masayuki Takase
  • Publication number: 20140185429
    Abstract: When a communication path between a user site and a dual-homed data center is made redundant, a communication between the user site and a server within a data center can be continued. An edge node DCE-1 of a data center 40-1 and edge nodes TPE-1, TPE-2 of a transport network are connected to each other by a link TPE-1-1 and a link TPE-2-1, respectively. The edge nodes TPE-3 and TPE-1, TPE-2 that hold a node AE51 of a user site 50 are set with an LSP 110 of an active system, and an LSP 120 of a backup system, respectively. One of the links is active, and the other link is backup, and the LSP of the TPE node having the active link in the LSP 100 and the LSP 120 is made active. The respective links are prioritized, and the links are switched to an active state in order from the links higher in the order of priority when a link failure or an LSP failure occurs.
    Type: Application
    Filed: December 17, 2013
    Publication date: July 3, 2014
    Applicant: HITACHI, LTD.
    Inventors: Masayuki TAKASE, Hideki ENDO, Yoshihiro ASHI, Taisuke UETA