Abstract: A light-emitting array can be driven by a matrix-type driving operation. When the packaging density of light-emitting elements is to be increased, the width of the element-separating region should be made narrower. The element-separating region extends over a considerable distance and therefore is apt to be adversely affected by particles. This tends to prevent formation of a good element-separating region, lowering manufacturing yield. An n-side electrode is arranged close to a predetermined number of LEDs. An element-separating region is formed to surround the LEDs and the n-side electrode, thereby defining a plurality of n-type semiconductor blocks. The element-separating region has a first portion that extends in a direction parallel to the line of the LEDs aligned and a second portion that extend between adjacent blocks. The first portion is wider than the second portion.

Abstract: An array of light-emitting elements is divided into cells, the cells are divided into electrically isolated blocks, and a multilayer wiring scheme is employed in which each block has two wire-bonding pads. A first wire leads from the first wire-bonding pad to one of the light-emitting elements in the block. A second wire leads from the second wire-bonding pad to an electrode disposed adjacent to the light-emitting elements in the block, preferably leading to a point near the middle of this electrode. The relative positions of the first and second bonding pads are varied so that the first wire can reach light-emitting elements in different positions in different blocks without crossing the second wire in any block.

Abstract: A light emitting diode in accordance with the present invention has a p-n junction which is formed by selectively implanting an impurity from the surface of a semiconductor substrate, and also has an etched groove which is formed in the p-n junction area near the surface of the substrate. In the area where the etched groove is formed, the p-type area and the n-type area are spatially separated in the region of the substrate, therefore the movement of minority carriers does not occur. As a consequence, in the light emitting diode in accordance with the present invention, the movement of minority carriers in the p-n junction interface occurs at a deeper position of the semiconductor substrate. In a deep position of the semiconductor substrate, the recombination rate of minority carriers is high. Therefore if the recombination of minority carriers is increased in a deep position, the emission efficiency of the light emitting diode increases.

Abstract: According to the present invention, a plurality of p-type semiconductor layers 13 are formed in a single row and a first layer insulating film 12 having first opening portions 16a and an n-side opening portion 17 is formed on the layers in an n-type semiconductor block 11. On the first layer insulating film 12, p-side electrodes 14 to connect to the p-type semiconductor layers 13 at the first opening portions 16a and an n-side electrode 55 (an n-side contact electrode 55a and an n-side pad electrode 55b) to connect with the n-type semiconductor block 11 at the n-side opening portion 17 are formed. Furthermore, p-side common wirings 4 to connect with specific p-side electrodes 14 are formed via a second layer insulating film 18. The p-side electrodes 14 and the n-side electrode 55 are formed using the same conductive film material through a single film formation and patterning process.

Abstract: In one aspect of the invention, a light-emitting semiconductor device has a light-emitting layer with a certain bandgap energy, an upper cladding layer with a higher bandgap energy, a first diffusion area extending into the light-emitting layer, a second diffusion area extending only into the upper cladding layer, and an electrode making contact with the second diffusion area, without covering any part of the first diffusion area. The second diffusion area conducts current to the first diffusion area, where light is emitted from a pn junction in the light-emitting layer. In another aspect of the invention, a semiconductor contact layer is provided to assure ohmic contact with the electrode, and the semiconductor contact layer is removed from the light-emitting area, avoiding absorption of light.

Abstract: A light-emitting semiconductor device has a semi-insulating semiconductor surface layer overlying a conductive semiconductor layer of a first conductive type. A diffusion region of a second conductive type extends through the semi-insulating semiconductor surface layer and ends in the conductive semiconductor layer. Positive and negative electrode contacts are provided on the upper surface of the device. Nonradiative recombination near the surface of the device is reduced because there is no pn junction in the semi-insulating semiconductor surface layer, and the device structure is suitable for matrix driving.

Abstract: A compound semiconductor layer of a first conductivity type is formed on a substrate, and a diffusion region of a second conductivity type is formed on the compound semiconductor layer. The light-emitting diode has a high emitted light power, using a large-diameter wafer.

Abstract: A light-emitting-diode array is formed on a substrate having an upper layer of a semiconducting material and a lower layer of an insulating or semi-insulating material. The upper layer is divided into blocks by isolation channels that cut completely through the upper layer. The light-emitting diodes, which are formed by selective diffusion of an impurity into the upper layer, are arranged in a single row, with at least two light-emitting diodes in each block of the upper layer. Each block has a block electrode that drives the light-emitting diodes in the block. The row of light-emitting diodes is paralleled by a number of shared lines which cross the isolation channels. Each shared line is coupled to a plurality of light-emitting diodes in different blocks.

Abstract: A light-emitting diode includes a first semiconductor epitaxial layer of a first conduction type, a second semiconductor epitaxial layer of the first conduction type laminated upon the first semiconductor epitaxial layer and having an energy band gap greater than that of the first semiconductor epitaxial layer, and an area of impurities formed within the first semiconductor epitaxial layer and the second semiconductor epitaxial layer by doping impurity of a second conduction type from the side of the second semiconductor epitaxial layer. A front of the diode is located within the first semiconductor epitaxial layer.

Abstract: A 1200 dpi LED may be manufactured without highly accurate mask alignment and provide good light radiation efficiency. A first interlayer dielectric is formed on a semiconductor substrate and has a plurality of first windows formed therein and aligned in a row. A diffusion region is formed in the semiconductor substrate through each of the first windows. An electrode is formed to have an area in contact with the corresponding diffusion region. Another electrode is formed on the other side of the substrate. A second interlayer dielectric is formed on the first interlayer dielectric such that the second interlayer dielectric does not overlap the area of the electrode and does not extend to a first perimeter of the area.

Abstract: A light-emitting-diode array is formed on a substrate having an upper layer of a semiconducting material and a lower layer of an insulating or semi-insulating material. The upper layer is divided into blocks by isolation channels that cut completely through the upper layer. The light-emitting diodes, which are formed by selective diffusion of an impurity into the upper layer, are arranged in a single row, with at least two light-emitting diodes in each block of the upper layer. Each block has a block electrode that drives the light-emitting diodes in the block. The row of light-emitting diodes is paralleled by a number of shared lines which cross the isolation channels. Each shared line is coupled to a plurality of light-emitting diodes in different blocks.

Abstract: A high-density semiconductor device and semiconductor device array exhibiting high light emission efficiency which can be mass-produced at low cost with high yield is provided. An LED array comprises a structure wherein an n-type GaAs buffer layer 102 is formed on an n-type GaAs substrate 101, on which are then stacked an n-type AlzGa1−zAs layer 103, an n-type AlyGa1−yAs layer 104, a semi-insulating AlxGa1−xAs layer 105, and a semi-insulating GaAs layer 106. The energy band gaps of the AlzGa1−zAs layer 103 and AlxGa1−xAs layer 105 are at least larger than the energy band gap of the AlyGa1−yAs layer 104. A pn junction is formed by selective diffusion, having a diffusion front in the semiconductor layer having the smaller energy band gap sandwiched between the semiconductor layers having the larger energy band gaps. The outermost layer forming ohmic contact is made a p-type GaAs region formed by zinc diffusion in a semi-insulating GaAs layer.

Abstract: To achieve a reduction in the size of the print head and a reduction in the cost, LED array chips 1 achieved by matrix-connecting M×N LED elements 2 with M pad electrodes to be scanned 4 and N pad electrodes to be driven 3 and LED array drive ICs 10 are mounted at a mounting substrate 41. The pad electrodes to be driven 3 are connected with drive pad electrodes 16 and the pad electrodes to be scanned 4 are connected with scan pad electrodes 17 through wires 42a and 42b respectively. The pad electrodes to be driven 3 and the pad electrodes to be scanned 4 are provided in a single row along one side or edge of the lengthwise side of the chip.

Abstract: A light emitting element module is provided in which plural chips, each of which includes plural light emitting elements, are arranged on a board. One side surface of each chip is expressed as a first side surface and another side surface of the chip which intersects the first side surface is expressed as a second side surface. Light emitting elements are located aside the first side surface at the upper side of the chip and arranged along the first side surface of said chips. The chips are arranged on the board so that at least two chips are displaced from each other to the right and left sides with respect to the chip alignment. Particularly, the plural chips may be disposed in a staggered arrangement on a board.

Abstract: A light emitting semiconductor device in which LEDs for emitting light different in wavelength from one another are densely integrated. First to fifth semiconductor layers are AlGaAs layers being different in Al composition ratio, and when it is assumed that the energy band gaps of the first to fifth semiconductor layers are respectively Eg1, Eg2, Eg3, Eg4 and Eg5, they satisfy the relation that Eg1<Eg2<Eg3<Eg4 and Eg1<Eg5. The pn fronts formed by p-type domains and the n-type domain of the semiconductor body are individually formed in the first semiconductor layer, the second semiconductor layer and the third semiconductor layer which form a stacked semiconductor layer. The LEDs emit light having wavelengths corresponding to the energy band gaps of the semiconductor layers in which the pn fronts are formed. These LEDs are integrated at intervals of a pitch between the p-type domains or the p-type electrodes.

Abstract: A light-sensing/emitting diode array chip has impurity diffusion regions with a depth of at least 0.5 .mu.m but not more than 2 .mu.m in a semiconductor substrate. Each impurity diffusion region is preferably divided into a first region, used for emitting or sensing light, and a wider second region, used for electrode contact. The second regions are located on alternate sides of the array line, permitting a small array pitch to be combined with a large contact area. In a wafer process for fabrication of the chips, a diffusion mask has both windows defining the impurity diffusion regions, and dicing line marks. The dicing line marks are narrowed where they pass adjacent to the windows at the ends of the chip. In the electrode fabrication step, a photomask with an enlarged pattern is used, to allow for misalignment with the diffusion mask.

Abstract: A light-emitting element is formed in a semiconductor substrate having a semi-insulating upper layer and a conductive lower layer. An impurity is diffused into both layers, forming a light-emitting area by creating a pn junction in the lower layer. An additional current-conducting area is formed by diffusion of the impurity into the upper layer. An electrode is formed on the substrate, making electrical contact with the current-conducting area, but not covering any part of the light-emitting area. The current-conducting area carries current from the electrode to the light-emitting area.

Abstract: In an array of light-emitting diodes formed by diffusion of an impurity into a semiconductor substrate, the width of the diodes in the array direction is between four-tenths and five-tenths of the array pitch. The width of the windows above the diodes is between three-tenths and four-tenths of the array pitch. Between one-fourth and one-half of the surface area of each diode is covered by an electrode making contact with the diode through the window. The distance from the centers of the light-emitting diodes at the ends of the array to the edges of the substrate is between twenty-five and sixty-five hundredths of the array pitch.

Abstract: A light-emitting element, or array of light-emitting elements, is formed by diffusion of an impurity into a semiconductor substrate, creating a light-emitting region. Following the diffusion, the surface zone of the light-emitting region, which includes crystal defects caused by the diffusion process, is removed by etching, thereby increasing the light-emitting efficiency by removing nonradiative recombination centers.

Abstract: A light-emitting semiconductor device has a planar structure including two multilayer reflecting layers, two cladding layers, and an active layer of a first conductive type. The cladding layers have bandgap energies exceeding the bandgap energy of the active layer. The multilayer reflecting layers each include at least one constituent layer with a bandgap energy exceeding the bandgap energy of the active layer. An area of a second conductive type extends from the upper surface of the device through the upper multilayer reflecting layer and upper cladding layer into the active layer, forming a pn junction in the active layer. This planar structure is suitable for high-yield manufacturing.