Patents by Inventor Masumi Taninaka

Masumi Taninaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6054724
    Abstract: A compound semiconductor layer of a first conductivity type is formed on a substrate, and a diffusion region of a second conductivity type is formed on the compound semiconductor layer. The light-emitting diode has a high emitted light power, using a large-diameter wafer.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: April 25, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Masumi Taninaka, Hiroshi Hamano
  • Patent number: 5997152
    Abstract: A light emitting element module is provided including a board and plural chips arranged in the form of an array on the board. Each chip includes at least one light emitting element having a light emitting function and/or a photosensing function. The chips are arranged on the board so that the upper surfaces of adjacent chips which are located opposite to the board are positionally displaced in the height direction of the chips by at least the distance corresponding to the thickness of the chips. This uneven chip arrangement in the height direction may be established by alternately arranging thicker chips and thinner chips on the board.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: December 7, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masumi Taninaka, Mitsuhiko Ogihara, Takatoku Shimizu
  • Patent number: 5972729
    Abstract: A method of manufacturing a light-emitting or a light-receiving diode array chip. A first interlayer dielectric is formed in each of a plurality of chip areas on a substrate of a first conductivity type. Impurity diffusion regions of a second conductivity type are formed in the substrate using the first interlayer dielectric as a diffusion mask. An electrode is formed in contact with each of the impurity diffusion regions. The substrate is separated so that the plurality of chip areas are separated into individual chips. A second interlayer dielectric may be formed on the first interlayer dielectric after forming the impurity diffusion regions. The second interlayer dielectric is formed such that the second interlayer dielectric is absent from a second area along which the substrate is separated into the individual chips, at least in the vicinity of the last one of a plurality of windows.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: October 26, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Takatoku Shimizu, Mitsuhiko Ogihara, Masumi Taninaka, Hiroshi Hamano
  • Patent number: 5955748
    Abstract: An end facet light emitting type LED has a slanted light emitting side wall relative to a substrate surface. A method for manufacturing end facet light emitting type light emitting devices prevents the pn-junction regions of the devices from being damaged while a semiconductor wafer is diced to separate light emitting devices from one another. A recess is formed on the semiconductor wafer having a depth which is deeper than the pn-junction. A portion to be cut during dicing of the wafer is vertically and horizontally separated from the pn-junction regions, so that if cracks occur when the wafer is diced, the cracks do not affect the light emitting characteristics of the devices.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: September 21, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yukio Nakamura, Mitsuhiko Ogihara, Masumi Taninaka, Takao Kusano, Masumi Koizumi, Hiroyuki Fujiwara, Makoto Ishimaru, Masaharu Nobori, Tsutomu Nomoto
  • Patent number: 5955747
    Abstract: A light-emitting-diode array is formed on a substrate having an upper layer of a semiconducting material and a lower layer of an insulating or semi-insulating material. The upper layer is divided into blocks by isolation channels that cut completely through the upper layer. The light-emitting diodes, which are formed by selective diffusion of an impurity into the upper layer, are arranged in a single row, with at least two light-emitting diodes in each block of the upper layer. Each block has a block electrode that drives the light-emitting diodes in the block. The row of light-emitting diodes is paralleled by a number of shared lines which cross the isolation channels. Each shared line is coupled to a plurality of light-emitting diodes in different blocks.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: September 21, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Kazuo Tokura, Yukio Nakamura, Masumi Taninaka, Takatoku Shimizu
  • Patent number: 5917227
    Abstract: A light-emitting-diode array includes a non-doped compound semiconductor layer between a substrate and a first compound semiconductor layer. A plurality of isolation regions extend from the first compound semiconductor layer to the surface of the non-doped compound semiconductor layer, and provide separation into isolated block regions each containing an equal number of diffusion regions. A plurality of shared electrode lines are connected to the diffusion regions in a plurality of the block regions, in such a relationship that diffusion regions selected from each of the block regions are connected to a common shared electrode. At least a surface portion of the substrate is formed of silicon. The density of the diffusion regions can be increased without increasing the number of the electrode pads. Moreover, the substrate is free from breakage or cracks.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: June 29, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Masumi Taninaka, Hiroshi Hamano
  • Patent number: 5869221
    Abstract: A method of fabricating an LED array includes forming a first insulating film composed of aluminum oxide on a semiconductor substrate of a first conductive type; patterning the first insulating film by photolithography to form a plurality of first windows; diffusing an impurity of a second conductive type through the plurality of first windows into the first insulating film, thereby forming a plurality of diffusion regions of the second conductive type below the plurality of first windows; forming a second insulating film on the first insulating film and the plurality of first windows; patterning the second insulating film by photolithography to-remove the second insulating film from the plurality of first windows, using an etchant that does not etch the first insulating film; forming a metal film on the second insulating film and the plurality of first windows; and patterning the metal film by photolithography to form a plurality of electrodes which make electrical contact with respective diffusion regions.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: February 9, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Takatoku Shimizu, Masumi Taninaka
  • Patent number: 5821567
    Abstract: A light-sensing/emitting diode array chip has impurity diffusion regions with a depth of at least 0.5 .mu.m but not more than 2 .mu.m in a semiconductor substrate. Each impurity diffusion region is preferably divided into a first region, used for emitting or sensing light, and a wider second region, used for electrode contact. The second regions are located on alternate sides of the array line, permitting a small array pitch to be combined with a large contact area. In a wafer process for fabrication of the chips, a diffusion mask has both windows defining the impurity diffusion regions, and dicing line marks. The dicing line marks are narrowed where they pass adjacent to the windows at the ends of the chip. In the electrode fabrication step, a photomask with an enlarged pattern is used, to allow for misalignment with the diffusion mask.
    Type: Grant
    Filed: December 11, 1996
    Date of Patent: October 13, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Takatoku Shimizu, Masumi Taninaka
  • Patent number: 5733689
    Abstract: A method of fabricating an LED array includes (a) forming a first insulating film composed of aluminum oxide on a semiconductor substrate of a first conductive type; (b) patterning the first insulating film by photolithography to form a plurality of first windows; (c) diffusing an impurity of a second conductive type through the plurality of first windows into the first insulating film, thereby forming a plurality of diffusion regions of the second conductive type below the plurality of first windows; (d) forming a second insulating film on the first insulating film and the plurality of first windows; (e) patterning the second insulating film by photolithography to remove the second insulating film from the plurality of first windows, using an etchant that does not etch the first insulating film; (f) forming a metal film on the second insulating film and the plurality of first windows; and (g) patterning the metal film by photolithography to form a plurality of electrodes which make electrical contact with re
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: March 31, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Takatoku Shimizu, Masumi Taninaka
  • Patent number: 5700714
    Abstract: A pn-junction element is formed in a compound semiconductor substrate by depositing an aluminum-nitride film on the surface of the substrate, patterning the aluminum-nitride film to form a diffusion mask, depositing a diffusion source film on the diffusion mask, diffusing an impurity from the diffusion source film into the substrate, and removing the diffusion source film with buffered hydrofluoric acid. Electrode lines can then be formed directly on the aluminum-nitride diffusion mask, which is not etched by buffered hydrofluoric acid.
    Type: Grant
    Filed: January 19, 1996
    Date of Patent: December 23, 1997
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Masumi Koizumi, Masumi Taninaka
  • Patent number: 5600157
    Abstract: According to a first aspect of the invention, a light-emitting and light-sensing diode has a doped region with a depth not exceeding 2 .mu.m, for adequate sensitivity, and an impurity concentration of at least 5.times.10.sup.20 atoms/cm.sup.-3, for adequate emission. According to a second aspect of the invention, a light-emitting and light-sensing diode has a doped region with a deep part and a shallow part, and the area of the shallow part is increased to enhance the sensitivity of the diode. This may be done by providing the doped region with a meandering edge, or with one or more interior islands, or by forming the deep and shallow parts separately.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: February 4, 1997
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Ichimatsu Abiko, Yukio Nakamura, Katsuzo Kaminishi, Takatoku Shimizu, Kazuo Tokura, Yasuo Iguti, Hiroshi Furuya, Mituhiko Ogihara, Masumi Taninaka, Mio Chiba
  • Patent number: 5530268
    Abstract: An LED array is fabricated by forming an insulating film on a semiconductor substrate of a first conductive type, forming a plurality of windows in the insulating film, and diffusing an impurity of a second conductive type through these windows to create a plurality of diffusion regions. In addition, an anti-reflection coating consisting of one or more transparent dielectric thin films is formed on the diffusion regions where they are exposed in the windows. The thickness of the anti-reflection coating, or of its constituent thin films, is optimized for maximum transmission of light.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: June 25, 1996
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Takatoku Shimizu, Masumi Taninaka
  • Patent number: 5523590
    Abstract: An LED array, including a semiconductor substrate of a first conductive type; a first insulating film formed on the substrate, comprising aluminum oxide and having a plurality of first windows; a second insulating film formed on the first insulating film, having a plurality of second windows aligned respectively with the plurality of first windows, the plurality of second windows being formed by a photolithography process that does not etch the first insulting film; a plurality of diffusion regions of a second conductive type, formed by diffusion of an impurity of the second conductive type through the plurality of first windows into the semiconductive substrate, for creating pn junctions from which and from near which light is emitted, principally through the plurality of first windows and the plurality of second windows; and a plurality of electrodes formed on the second insulating film, extending through the plurality of first windows and the plurality of second windows, and making electrical contact with
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: June 4, 1996
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Takatoku Shimizu, Masumi Taninaka