Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: A transceiver or RF front end employing a transformer with a low loss transmit/receive (T/R) switch circuit in the ground path. In various embodiments, differential outputs of a power amplifier are coupled to the first winding of the transformer, while the input of a low noise amplifier is coupled to the second side of the transformer via a matching inductor. The T/R switch circuit, which may be a thin oxide CMOS transistor, is coupled between the second side of the transformer and ground. In operation, the T/R switch circuit may be enabled during transmit mode operations of the power amplifier, such that a low impedance path to ground is provided at the input of the low noise amplifier, thereby protecting it from high voltage swings generated by the power amplifier.

Abstract: A transceiver or RF front end employing a transformer with a low loss transmit/receive (T/R) switch circuit in the ground path. In various embodiments, differential outputs of a power amplifier are coupled to the first winding of the transformer, while the input of a low noise amplifier is coupled to the second side of the transformer via a matching inductor. The T/R switch circuit, which may be a thin oxide CMOS transistor, is coupled between the second side of the transformer and ground. In operation, the T/R switch circuit may be enabled during transmit mode operations of the power amplifier, such that a low impedance path to ground is provided at the input of the low noise amplifier, thereby protecting it from high voltage swings generated by the power amplifier.

Abstract: A transceiver or RF front end employing a transformer with a low loss transmit/receive (T/R) switch circuit in the ground path. In various embodiments, differential outputs of a power amplifier are coupled to the first winding of the transformer, while the input of a low noise amplifier is coupled to the second side of the transformer via a matching inductor. The T/R switch circuit, which may be a thin oxide CMOS transistor, is coupled between the second side of the transformer and ground. In operation, the T/R switch circuit may be enabled during transmit mode operations of the power amplifier, such that a low impedance path to ground is provided at the input of the low noise amplifier, thereby protecting it from high voltage swings generated by the power amplifier.

Abstract: A transceiver or RF front end employing a transformer with a low loss transmit/receive (T/R) switch circuit in the ground path. In various embodiments, differential outputs of a power amplifier are coupled to the first winding of the transformer, while the input of a low noise amplifier is coupled to the second side of the transformer via a matching inductor. The T/R switch circuit, which may be a thin oxide CMOS transistor, is coupled between the second side of the transformer and ground. In operation, the T/R switch circuit may be enabled during transmit mode operations of the power amplifier, such that a low impedance path to ground is provided at the input of the low noise amplifier, thereby protecting it from high voltage swings generated by the power amplifier.

Abstract: A capacitive voltage converter comprising a switched capacitor array having a voltage input and a voltage output. A skip gating control coupled to the switched capacitor array and configured to control a switching activity of the switched capacitor array. A resistance look-up table coupled to the switched capacitor array and configured to control a resistance value of the switched capacitor array.

Abstract: There is described a continuous time filter of at least a second (or higher) order, comprising one or more first order filter stages of a first type, the or each first order filter stage of the first type comprising a reactive component and an impedance dependent on the difference between the input and output voltages of the filter stage. The filter includes at least one first order filter stage of a second type, the or each second order filter of the second type comprising a reactive component and an impedance dependent on the sum of the input and output voltages of the filter stage. The filter includes a transfer function of the continuous time filter that is obtained comprising complex poles.

Abstract: A capacitive voltage converter comprising a switched capacitor array having a voltage input and a voltage output. A skip gating control coupled to the switched capacitor array and configured to control a switching activity of the switched capacitor array. A resistance look-up table coupled to the switched capacitor array and configured to control a resistance value of the switched capacitor array.

Abstract: In an integrated circuit having a number of circuit units on a single semiconductor chip, particularly in a system-on-chip integrated circuit including an integrated transceiver, interference between the circuit units is suppressed using on-chip resonant elements. Each resonant element has at least one on-chip capacitor and at least one on-chip conductive line constituting an inductance. The capacitance-inductance combinations are arranged to be resonant at one or more frequencies at which radio frequency energy is generated by the circuit units. The capacitive part of each series resonant combination is formed as a plurality of capacitor elements forming in an array to minimise self-inductance. Also disclosed is a filtering arrangement in which each circuit unit is individually supplied from the tap of a series resistive-capacitance combination to provide low-pass filtering.

Abstract: The present invention addresses a need for reducing the power consumption in a baseband filter used in a front-end wireless receiver while providing the necessary linearity. In particular, relatively high linearity can be obtained with lower power consumption than has heretofore been the case. This is achieved in embodiments of the invention using an optimized single-branch fully differential structure which operates as a “composite” source-follower (when using CMOS devices) with an ideal unitary dc gain. A positive feedback internal to the source follower allows one to synthesize two complex-poles.

Abstract: An electric circuit, for use in a phase lock loop circuit, the electric circuit comprising: a first circuit element, being a phase frequency detector or a charge pump; at least one LC resonant loop, the first circuit element forming part of the loop; and means arranged to reduce ringing in said at least one LC resonant loop.

Abstract: An electric circuit, for use in a phase lock loop circuit, the electric circuit comprising: a first circuit element, being a phase frequency detector or a charge pump; at least one LC resonant loop, the first circuit element forming part of the loop; and means arranged to reduce ringing in said at least one LC resonant loop.

Abstract: In an integrated circuit having a number of circuit units on a single semiconductor chip, particularly in a system-on-chip integrated circuit including an integrated transceiver, interference between the circuit units is suppressed using on-chip resonant elements. Each resonant element has at least one on-chip capacitor and at least one on-chip conductive line constituting an inductance. The capacitance-inductance combinations are arranged to be resonant at one or more frequencies at which radio frequency energy is generated by the circuit units. The capacitive part of each series resonant combination is formed as a plurality of capacitor elements forming in an array to minimise self-inductance. Also disclosed is a filtering arrangement in which each circuit unit is individually supplied from the tap of a series resistive-capacitance combination to provide low-pass filtering.

Abstract: There is described a continuous time filter of at least a second (or higher) order, comprising one or more first order filter stages of a first type, the or each first order filter stage of the first type comprising a reactive component and an impedance dependent on the difference between the input and output voltages of the filter stage. The filter includes at least one first order filter stage of a second type, the or each second order filter of the second type comprising a reactive component and an impedance dependent on the sum of the input and output voltages of the filter stage. The filter includes a transfer function of the continuous time filter that is obtained comprising complex poles.

Abstract: A radio-frequency receiver for, e.g., receiving GPS signals in a cellular telephone has an input, a first gain stage in the form of a linear low noise amplifier with voltage-voltage feedback and a resonant load, and a second gain stage based on a common source input transconductor. Associated with the input and the first gain stage is a filter comprising a notch filter part for rejecting an interfering signal, e.g. a cell phone transmitter signal, and, connected between the parallel resonant circuit and the input, a series capacitance which, in combination with the inductor of the parallel-resonant circuit, forms a series-resonant circuit to provide a low impedance path at a wanted signal frequency.

Abstract: The present invention addresses a need for reducing the power consumption in a baseband filter used in a front-end wireless receiver while providing the necessary linearity. In particular, relatively high linearity can be obtained with lower power consumption than has heretofore been the case. This is achieved in embodiments of the invention using an optimized single-branch fully differential structure which operates as a “composite” source-follower (when using CMOS devices) with an ideal unitary dc gain. A positive feedback internal to the source follower allows one to synthesize two complex-poles.

Abstract: A low-power quadrature generator is provided for accurately generating in-phase signals and quadrature signals.