Abstract: A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements.

Abstract: An inductor current flows through an inductor of a flyback converter. In a constant voltage mode, the pulse width of an inductor switch control signal is adjusted to maintain a constant output voltage of the flyback converter. The inductor switch control signal controls a switch through which the inductor current flows. In a constant current mode, a comparing circuit, a control loop and a clamp generator circuit are used to maintain the peak level of inductor current. The comparing circuit generates a timing signal based on the ramp-up rate of the inductor current. The control loop uses the timing signal and a feedback signal to generate a time error signal. The clamp generator circuit uses the time error signal to generate a clamp signal that adjusts the pulse width of the inductor switch control signal to clamp the peak current output by the flyback converter in the constant current mode.

Abstract: A low-cost integrated circuit is used as a secondary side constant voltage and constant current controller. The integrated circuit has four terminals and two amplifier circuits. A first amplifier circuit is used to sense a voltage on a FB terminal and in response to cause a first current to flow through an OPTO terminal. A second amplifier circuit is used to sense a voltage between a SENSE terminal and a SOURCE terminal and in response to cause a second current to flow through the same OPTO terminal. The FB terminal is used for output voltage feedback and is also used to supply power onto the integrated circuit. The SOURCE terminal is used for output current feedback and is also used as power supply return for the integrated circuit. The cost of the integrated circuit is reduced by having only four terminals.

Abstract: Certain metallocene compounds are provided that, when used as a component in a supported polymerization catalyst under industrially relevant polymerization conditions, afford high molar mass homo polymers or copolymers like polypropylene or propylene/ethylene copolymers without the need for any ?-branched substituent in either of the two available 2-positions of the indenyl ligands. The substituent in the 2-position of one indenyl ligand can be any radical comprising hydrogen, methyl, or any other C2-C40 hydrocarbon which is not branched in the ?-position, and substituent in the 2-position of the other indenyl ligand can be any C5-C40 hydrocarbon radical with the proviso that this hydrocarbon radical is branched in the ?-position and that the ?-carbon atom is a quarternary carbon atom and part of a non-cyclic hydrocarbon system. This metallocene topology affords high melting point, very high molar mass homo polypropylene and very high molar mass propylene-based copolymers.

Abstract: A loudspeaker system includes an enclosure having an open end defining a plane, a baffle, a loudspeaker operating in the 4 kHz to 10 kHz range, and a device, preferably a ribbed portion having a plurality of grooves, coupled to the baffle for modifying the spectral profile of the projected sound waves. The baffle includes first and second angled surfaces each oriented at an oblique angle with respect to the plane. The speaker is coupled to the first angled surface and the ribbed portion is coupled to the baffle along the intersection of the first angled surface and the second angled surface. When mounted in a wall or ceiling, the system projects a sound field substantially indistinguishable from that of a loudspeaker located within the listener's listening plane. The baffle can also have acoustic damping material attached thereto, with grooves formed therein, to prevent reflections of 4 kHz to 10 kHz sound.

Abstract: A flyback AC/DC switching converter has a constant voltage (CV) mode. The CV mode has sub-modes. In one sub-mode (“mid output power sub-mode”), the output voltage (VOUT) of the converter is regulated using both pulse width modulation and pulse frequency modulation. Both types of modulation are used simultaneously. In a second sub-mode (“low output power sub-mode”), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency. By setting the first frequency at a frequency above the frequency limit of human hearing, an undesirable audible transformer humming that might otherwise occur is avoided. In some embodiments, the converter has a third sub-mode (“high output power sub-mode”), in which pulse width modulation is used but the switching frequency is fixed at a second frequency. By proper setting of the second frequency, undesirable EMI radiation and other problems that might otherwise occur are avoided.

Abstract: Systems and methods for varying dye loads. A fluid ejection apparatus includes a reservoir and an assembly. The reservoir stores ink with a first dye load and the assembly receives the ink with the first dye load from the reservoir. To obtain ink with higher dye load, the assembly evaporates a portion of the liquid solvent in the ink to obtain ink with a higher dye load.

Abstract: A comparing circuit and a control loop are used to maintain the peak level of current flowing through an inductor of a flyback converter. An inductor switch control signal controls an inductor switch through which the inductor current flows. The inductor current increases at a ramp-up rate during a ramp time and stops increasing at the end of the ramp time. The comparing circuit generates a timing signal that indicates a target time at which the inductor current would reach a predetermined current limit if the inductor current continued to increase at the ramp-up rate. The control loop then receives the timing signal and compares the target time to the end of the ramp time. The pulse width of the inductor switch control signal is increased when the target time occurs after the end of the ramp time. Adjusting the pulse width controls the peak of the inductor current.

Abstract: A cord correction circuit in a primary-side-controlled flyback converter compensates for the loss of output voltage caused by the resistance of the charger cord. In one embodiment, a correction voltage is subtracted from a feedback voltage received from a primary-side auxiliary inductor. A pre-amplifier then compares a reference voltage to the corrected feedback voltage. In another embodiment, the correction voltage is summed with the reference voltage, and the pre-amplifier compares the feedback voltage to the corrected reference voltage. The difference between the voltages on the input leads of the pre-amplifier is used to increase the output voltage to compensate for the voltage lost through the charger cord. The flyback converter also has a comparing circuit and a control loop that maintain the peak level of current flowing through the primary inductor of the converter. Adjusting the frequency and pulse width of an inductor switch signal controls the converter output current.

Abstract: A comparing circuit and a control loop are used to maintain the peak level of current flowing through an inductor of a flyback converter. An inductor switch control signal controls an inductor switch through which the inductor current flows. The inductor current increases at a ramp-up rate during a ramp time and stops increasing at the end of the ramp time. The comparing circuit generates a timing signal that indicates a target time at which the inductor current would reach a predetermined current limit if the inductor current continued to increase at the ramp-up rate. The control loop then receives the timing signal and compares the target time to the end of the ramp time. The pulse width of the inductor switch control signal is increased when the target time occurs after the end of the ramp time. Adjusting the pulse width controls the peak of the inductor current.

Abstract: A cord correction circuit in a primary-side-controlled flyback converter compensates for the loss of output voltage caused by the resistance of the charger cord. In one embodiment, a correction voltage is subtracted from a feedback voltage received from a primary-side auxiliary inductor. A pre-amplifier then compares a reference voltage to the corrected feedback voltage. In another embodiment, the correction voltage is summed with the reference voltage, and the pre-amplifier compares the feedback voltage to the corrected reference voltage. The difference between the voltages on the input leads of the pre-amplifier is used to increase the output voltage to compensate for the voltage lost through the charger cord. The flyback converter also has a comparing circuit and a control loop that maintain the peak level of current flowing through the primary inductor of the converter. Adjusting the frequency and pulse width of an inductor switch signal controls the converter output current.

Abstract: An integrated circuit includes a plurality of tiles. One tile is a master tile. Other tiles contain writable registers of memory structures. Information for configuring circuitry of the tile is stored in the register in the tile. An individual one of the registers can be written via the master tile. Each memory structure of a register includes a non-volatile floating gate cell (that stores the configuration information) as well as a volatile cell. All transistors have the same gate insulator thickness. Although a programming pulse signal is applied to all memory structures, the state of the non-volatile cell of a memory structure is only changed if the state stored by the associated non-volatile cell differs from the state stored by the volatile cell. Floating gates are automatically refreshed by the programming pulse signal. By storing configuration information in each tile, inefficiencies associated with using blocks of non-volatile memory are avoided.

Abstract: A flyback AC/DC switching converter has a constant voltage (CV) mode. The CV mode has sub-modes. In one sub-mode (“mid output power sub-mode”), the output voltage (VOUT) of the converter is regulated using both pulse width modulation and pulse frequency modulation. Both types of modulation are used simultaneously. In a second sub-mode (“low output power sub-mode”), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency. By setting the first frequency at a frequency above the frequency limit of human hearing, an undesirable audible transformer humming that might otherwise occur is avoided. In some embodiments, the converter has a third sub-mode (“high output power sub-mode”), in which pulse width modulation is used but the switching frequency is fixed at a second frequency. By proper setting of the second frequency, undesirable EMI radiation and other problems that might otherwise occur are avoided.

Abstract: Certain metallocene compounds are provided that, when used as a component in a supported polymerization catalyst under industrially relevant polymerization conditions, afford high molar mass homo polymers or copolymers like polypropylene or propylene/ethylene copolymers without the need for any ?-branched substituent in either of the two available 2-positions of the indenyl ligands. The substituent in the 2-position of one indenyl ligand can be any radical comprising hydrogen, methyl, or any other C2-C40 hydrocarbon which is not branched in the ?-position, and the substituent in the 2-position of the other indenyl ligand can be any C4-C40 hydrocarbon radical with the proviso that this hydrocarbon radical is branched in the ?-position. This metallocene topology affords high melting point, very high molar mass homo polypropylene and very high molar mass propylene-based copolymers. The activity/productivity levels of catalysts including the metallocenes of the present invention are exceptionally high.

Abstract: A metallocene compound with the 4- and 7-positions on the indenyl moiety possessing large aromatic substituents is prepared in accordance with a method which produces substantially 100 percent racemic isomer. Advantageously, polymerisation catalysts including the metallocene of the invention provide superior olefin polymerisation results.

Abstract: A power converter having a switched capacitor buck/boost operation has first and second switches coupled to a first switching node, third and fourth switches coupled to a second switching node, a capacitor coupled between the first and second switching nodes, and an inductor coupled to the first switching node. A switch controller controls the switches to operate in voltage step-down mode and voltage step-up mode depending on a difference between converter output voltage VOUT and converter input voltage VIN. In a buck-optimized topology operating in a step-down mode, an output current flowing through the first switching node flows through only one switch at a given time. In a boost-optimized topology operating in a step-up mode, an output current flowing through the first switching node flows through only one switch at a given time. As a result, a more compact and efficient power converter may be realized at lower cost.

Abstract: A programmable analog tile integrated circuit configuration tool communicates a power management control characteristic query soliciting control requirement information for a novel Power Management Integrated Circuit (PMIC) tile in a Multi-Tile Power Management Integrated Circuit (MTPMIC). The configuration tool receives a user response to the query indicating control requirements across a network. The PMIC tile includes configuration registers. Configuration information bit values stored in the configuration registers control the operational characteristics of the functional circuitry of the tile. The configuration registers of each novel PMIC tile are accessible at pre-defined addresses on a standardized bus of the MTPMIC. In response to the user response, the configuration tool generates appropriate tile configuration information for loading the configuration registers such that the PMIC tile within the MTPMIC is programmed to satisfy the user's control requirements.

Abstract: A programmable analog tile integrated circuit placement tool allows a user to manipulate a graphical representation of a first power management integrated circuit (PMIC) tile with respect to a graphical representation of a second PMIC tile in a proposed Multi-Tile Power Management Integrated Circuit (MTPMIC). The novel PMIC tiles have pre-defined physical structures including a bus portion and a memory structure for storing configuration information for configuring the tile. When appropriately placed in a MTPMIC, the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. A remote user with minimal training in analog circuit design may command the placement of individual tiles in a proposed MTPMIC layout. Upon receiving a user response indicating satisfaction with the placement of PMIC tiles, the tool quickly and automatically generates physical layout data suitable for fabrication of the MTPMIC.

Abstract: A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements.

Abstract: An Analog Tile Selection, Placement, Configuration and Programming (ATSPCP) tool communicates a power management characteristic query over a network. The query is displayed to a user on a webpage. The query is a solicitation for desired characteristics of a Power Management Integrated Circuit (PMIC). After receiving user requirements in a response to the query, the tool selects a number of power management integrated circuit tiles having pre-defined physical structures. The pre-defined structure of each tile includes a bus portion and a memory structure for storing configuring information for the tile. When combined in a Multi-Tile Power Management Integrated Circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC that meets the user requirements. The ATSPCP tool combines the physical layout data of each selected PMIC tile to form composite physical layout data for the overall MTPMIC.