Patents by Inventor Matthew David Romig
Matthew David Romig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9899339Abstract: A method of making an electronic device having a discrete device mounted on a surface of an electronic die with both the discrete device and the die connected by heat cured conductive ink and covered with cured encapsulant including placing the discrete device on the die; and keeping the temperature of each of the discrete device and the die below about 200° C. Also disclosed is a method of electrically attaching a discrete device to a substrate that includes placing the device on the substrate, applying conductive ink that connects at least one terminal on the device to at least one contact on the substrate and curing the conductive ink. Also disclosed is an IC package with a discrete electrical device having electrical terminals; an electrical substrate having contact pads on a surface thereof; and cured conductive ink connecting at least one of the electrical terminals with at least one of the contact pads.Type: GrantFiled: November 5, 2012Date of Patent: February 20, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Matthew David Romig, Lance Cole Wright, Leslie Edward Stark, Frank Stepniak, Sreenivasan K. Koduri
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Publication number: 20170347490Abstract: A heat dissipating antenna comprised of a low-attenuating heat spreader bonded to a high frequency antenna or antenna array. An integrated circuit with a wireless integrated circuit chip, and a heat dissipating antenna coupled to the wireless integrated circuit chip. A method of forming a heat dissipating antenna.Type: ApplicationFiled: May 24, 2016Publication date: November 30, 2017Inventors: Matthew David Romig, Robert Clair Keller, Ming Li, Yiqi Tang
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Patent number: 9780017Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.Type: GrantFiled: November 9, 2016Date of Patent: October 3, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Benjamin Stassen Cook, Juan Alejandro Herbsommer, Yong Lin, Rongwei Zhang, Abram Castro, Matthew David Romig
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Patent number: 9768130Abstract: An integrated power package includes a substrate having a first surface and an integrated circuit located within the substrate. At least one electrical conductor is located between the first surface and another point on the substrate. At least one transistor is electrically and mechanically coupled to the at least one first conductor. A support structure is electrically and mechanically coupled to the at least one transistor, wherein the at least one transistor is located between the first surface of the substrate and the support structure.Type: GrantFiled: October 26, 2015Date of Patent: September 19, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Matthew David Romig, Christopher Daniel Manack
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Patent number: 9679864Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.Type: GrantFiled: October 13, 2016Date of Patent: June 13, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Benjamin Stassen Cook, Juan Alejandro Herbsommer, Matthew David Romig, Steven Alfred Kummerl, Wei-Yan Shih
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Patent number: 9647329Abstract: An encapsulated integrated circuit has transceiver circuitry operable to produce and/or receive a radio frequency (RF) signal, wherein bond pads on the IC die are coupled to the transceiver input/output (IO) circuitry. An antenna structure is coupled to the IO circuitry via the bond pads. Mold material encapsulates the IC die and the antenna structure, wherein the antenna structure is positioned so as to be approximately in alignment with a core of a dielectric waveguide positioned adjacent the encapsulated IC.Type: GrantFiled: December 30, 2014Date of Patent: May 9, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Juan Alejandro Herbsommer, Matthew David Romig
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Publication number: 20170117238Abstract: An integrated power package includes a substrate having a first surface and an integrated circuit located within the substrate. At least one electrical conductor is located between the first surface and another point on the substrate. At least one transistor is electrically and mechanically coupled to the at least one first conductor. A support structure is electrically and mechanically coupled to the at least one transistor, wherein the at least one transistor is located between the first surface of the substrate and the support structure.Type: ApplicationFiled: October 26, 2015Publication date: April 27, 2017Inventors: Matthew David Romig, Christopher Daniel Manack
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Publication number: 20170053854Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.Type: ApplicationFiled: November 9, 2016Publication date: February 23, 2017Inventors: Benjamin Stassen Cook, Juan Alejandro Herbsommer, Yong Lin, Rongwei Zhang, Abram Castro, Matthew David Romig
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Publication number: 20170033072Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.Type: ApplicationFiled: October 13, 2016Publication date: February 2, 2017Inventors: Benjamin Stassen Cook, Juan Alejandro Herbsommer, Matthew David Romig, Steven Alfred Kummerl, Wei-Yan Shih
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Patent number: 9527728Abstract: A method of forming a packaged electronic device includes fabricating a MEMS structure, such as a BAW structure, on a first semiconductor wafer substrate; forming a cavity in a second semiconductor wafer substrate; and mounting the second substrate on the first substrate such that the MEMS structure is positioned inside the cavity in the second substrate. A wafer level assembly and an integrated circuit package are also described.Type: GrantFiled: July 22, 2013Date of Patent: December 27, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Matthew David Romig, Marie-Solange Anne Milleron, Benjamin Michael Sutton
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Patent number: 9524926Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.Type: GrantFiled: September 9, 2015Date of Patent: December 20, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Benjamin Stassen Cook, Juan Alejandro Herbsommer, Yong Lin, Rongwei Zhang, Abram Castro, Matthew David Romig
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Patent number: 9496171Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.Type: GrantFiled: September 9, 2015Date of Patent: November 15, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Benjamin Stassen Cook, Juan Alejandro Herbsommer, Matthew David Romig, Steven Alfred Kummerl, Wei-Yan Shih
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Publication number: 20160096727Abstract: A method of forming a packaged electronic device includes fabricating a MEMS structure, such as a BAW structure, on a first semiconductor wafer substrate; forming a cavity in a second semiconductor wafer substrate; and mounting the second substrate on the first substrate such that the MEMS structure is positioned inside the cavity in the second substrate using epoxy die attachment film. A wafer level assembly and an integrated circuit package are also described.Type: ApplicationFiled: December 14, 2015Publication date: April 7, 2016Inventors: Matthew David Romig, Marie-Solange Anne Milleron, Benjamin Michael Sutton
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Publication number: 20160093525Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.Type: ApplicationFiled: September 9, 2015Publication date: March 31, 2016Inventors: BENJAMIN STASSEN COOK, JUAN ALEJANDRO HERBSOMMER, MATTHEW DAVID ROMIG, STEVEN ALFRED KUMMERL, WEI-YAN SHIH
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Publication number: 20160093558Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.Type: ApplicationFiled: September 9, 2015Publication date: March 31, 2016Inventors: BENJAMIN STASSEN COOK, JUAN ALEJANDRO HERBSOMMER, YONG LIN, RONGWEI ZHANG, ABRAM CASTRO, MATTHEW DAVID ROMIG
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Publication number: 20150295305Abstract: An encapsulated integrated circuit has transceiver circuitry operable to produce and/or receive a radio frequency (RF) signal, wherein bond pads on the IC die are coupled to the transceiver input/output (IO) circuitry. An antenna structure is coupled to the IO circuitry via the bond pads. Mold material encapsulates the IC die and the antenna structure, wherein the antenna structure is positioned so as to be approximately in alignment with a core of a dielectric waveguide positioned adjacent the encapsulated IC.Type: ApplicationFiled: December 30, 2014Publication date: October 15, 2015Inventors: Juan Alejandro Herbsommer, Matthew David Romig
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Patent number: 9111845Abstract: An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die.Type: GrantFiled: August 26, 2014Date of Patent: August 18, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Matthew David Romig, Lance Cole Wright, Leslie Edward Stark, Frank Stepniak, Sreenivasan K. Koduri
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Patent number: 8945986Abstract: One method of making an electronic assembly includes mounting one electrical substrate on another electrical substrate with a face surface on the one substrate oriented transversely of a face surface of the other substrate. The method also includes inkjet printing on the face surfaces a conductive trace that connects an electrical contact on the one substrate with an electrical connector on the other substrate. An electronic assembly may include a first substrate having a generally flat surface with a first plurality of electrical contacts thereon; a second substrate having a generally flat surface with a second plurality of electrical contacts thereon, the surface of the second substrate extending transversely of the surface of said first substrate; and at least one continuous conductive ink trace electrically connecting at least one of the first plurality of electrical contacts with at least one of the second plurality of electrical contacts.Type: GrantFiled: January 14, 2014Date of Patent: February 3, 2015Assignee: Texas Instruments IncorporatedInventors: Matthew David Romig, Lance Cole Wright, Leslie Edward Stark, Frank Stepniak, Sreenivasan K. Koduri
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Publication number: 20150021721Abstract: A method of forming a packaged electronic device includes fabricating a MEMS structure, such as a BAW structure, on a first semiconductor wafer substrate; forming a cavity in a second semiconductor wafer substrate; and mounting the second substrate on the first substrate such that the MEMS structure is positioned inside the cavity in the second substrate. A wafer level assembly and an integrated circuit package are also described.Type: ApplicationFiled: July 22, 2013Publication date: January 22, 2015Applicant: Texas Instruments IncorporatedInventors: Matthew David Romig, Marie-Solange Anne Milleron, Benjamin Michael Sutton
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Publication number: 20140361402Abstract: An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die.Type: ApplicationFiled: August 26, 2014Publication date: December 11, 2014Inventors: Matthew David Romig, Lance Cole Wright, Leslie Edward Stark, Frank Stepniak, Sreenivasan K. Koduri