Patents by Inventor Matthew Glenn Peters

Matthew Glenn Peters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220209501
    Abstract: A method of forming a vertical cavity surface emitting laser (VCSEL) device using a multiphase growth sequence includes forming a first mirror over a substrate; forming an active region (e.g., a dilute nitride active region) over the first mirror; forming an oxidation aperture (OA) layer over the active region; forming a spacer on a surface of the OA layer; and forming a second mirror over the spacer. The active region is formed using a molecular beam epitaxy (MBE) process during an MBE phase of the multiphase growth sequence and the second mirror is formed using a metal-organic chemical vapor deposition (MOCVD) process during an MOCVD phase of the multiphase growth sequence.
    Type: Application
    Filed: June 30, 2021
    Publication date: June 30, 2022
    Inventors: Guowei ZHAO, Jun YANG, Ajit Vijay BARVE, Matthew Glenn PETERS
  • Publication number: 20220209500
    Abstract: An optical chip may include a vertical-cavity surface-emitting laser (VCSEL) structure. The optical chip may include a capacitor over at least a portion of an active layer of the VCSEL structure that is outside of an active region of the VCSEL structure. The capacitor may include a first metal layer over the portion of the active layer, a dielectric layer on the first metal layer, and a second metal layer on the dielectric layer. The optical chip may include an isolation region between a substrate of the VCSEL and a portion of the capacitor outside of the VCSEL.
    Type: Application
    Filed: June 30, 2021
    Publication date: June 30, 2022
    Inventors: Siu Kwan CHEUNG, Matthew Glenn PETERS, Mohammad Ali SHIRAZI HOSSEINI DOKHT, Hao HUANG, Lijun ZHU
  • Publication number: 20220209506
    Abstract: A method of forming a VCSEL device cavity using a multiphase growth sequence includes forming a first mirror over a substrate, forming a tunnel junction over the first mirror, forming an oxidation aperture (OA) layer over the tunnel junction, forming a p-doped layer over the OA layer, forming an active region over the p-doped layer, forming a second mirror over the active region, and forming a contact layer over the second mirror. The first mirror, the tunnel junction, the OA layer, and the p-doped layer are formed using a metal-organic chemical vapor deposition (MOCVD) process during an MOCVD phase of the multiphase growth sequence. The active region, the second mirror, and the contact layer are formed using a molecular beam epitaxy (MBE) process during an MBE phase of the multiphase growth sequence.
    Type: Application
    Filed: June 30, 2021
    Publication date: June 30, 2022
    Inventors: Benjamin KESLER, Ajit Vijay BARVE, Jun YANG, Guowei ZHAO, Matthew Glenn PETERS
  • Publication number: 20220052509
    Abstract: In some implementations, a vertical-cavity surface-emitting laser (VCSEL) array may comprise a plurality of channels, a plurality of traces, and a plurality of emitters. A channel, of the plurality of channels, may include a set of emitters, of the plurality of emitters, arranged in a row of emitters. The channel may include a trace, of the plurality of traces, that has a trace width that is tapered along a length of the trace. Numerous other aspects are provided.
    Type: Application
    Filed: October 20, 2020
    Publication date: February 17, 2022
    Inventors: Mohammad Ali SHIRAZI HOSSEINI DOKHT, Ajit Vijay BARVE, Matthew Glenn PETERS
  • Publication number: 20210399525
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) array may include an n-type substrate layer and an n-type metal on a bottom surface of the n-type substrate layer. The n-type metal may form a common anode for a group of VCSEL. The VCSEL array may include a bottom mirror structure on a top surface of the n-type substrate layer. The bottom mirror structure may include one or more bottom mirror sections and a tunnel junction to reverse a carrier type within the bottom mirror structure. The VCSEL array may include an active region on the bottom mirror structure and an oxidation layer to provide optical and electrical confinement. The VCSEL array may include an n-type top mirror on the active region, a top contact layer over the n-type top mirror, and a top metal on the top contact layer. The top metal may form an isolated cathode for the VCSEL array.
    Type: Application
    Filed: December 28, 2020
    Publication date: December 23, 2021
    Inventors: Guowei ZHAO, Matthew Glenn PETERS, Jun YANG, Eric R. HEGBLOM
  • Publication number: 20210399530
    Abstract: A VCSEL array may include a semiconductor substrate and a plurality of emitters on the substrate that conforms to an emitter pattern. The emitter pattern may be oriented at a non-zero angle to an edge of the substrate and may comprise two or more unit cells arranged to form the emitter pattern. Each unit cell, of the two or more unit cells, may include a same number of emitters, and the two or more unit cells may be arranged to cause a measurement of misalignment associated with two adjacent unit cells, of the two or more unit cells, to satisfy a misalignment threshold.
    Type: Application
    Filed: September 29, 2020
    Publication date: December 23, 2021
    Inventors: Mohammad Ali SHIRAZI HOSSEINI DOKHT, Matthew Glenn PETERS, John Michael MILLER
  • Patent number: 11196230
    Abstract: An emitter array may comprise a plurality of emitters and a metallization layer to electrically connect the plurality of emitters. The metallization layer may have a first end and a second end. The plurality of emitters may include a first emitter and a second emitter. The first emitter may be located closer to the first end than the second emitter. The first emitter and the second emitter have differently sized structures to compensate for a first impedance of the metallization layer between the first end and the first emitter and a second impedance between the first end and the second emitter.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: December 7, 2021
    Assignee: Lumentum Operations LLC
    Inventors: Ajit Vijay Barve, Benjamin Kesler, Matthew Glenn Peters
  • Patent number: 11189988
    Abstract: A device includes a substrate, a vertical cavity surface emitting laser (VCSEL) array on top of the substrate, a via through the substrate and the VCSEL array, a first electrode extended from a top of the VCSEL array to a bottom of the substrate, through the via, the first electrode electrically connected to the VCSEL array, a second electrode on the bottom of the substrate, the second electrode electrically connected to the VCSEL array, and an isolator in the via providing electrical isolation between the first electrode and the second electrode.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: November 30, 2021
    Assignee: Lumentum Operations LLC
    Inventor: Matthew Glenn Peters
  • Publication number: 20210367407
    Abstract: A VCSEL may include an n-type substrate layer and an n-type bottom mirror on a surface of the n-type substrate layer. The VCSEL may include an active region on the n-type bottom mirror and a p-type layer on the active region. The VCSEL may include an oxidation layer over the active region to provide optical and electrical confinement of the VCSEL. The VCSEL may include a tunnel junction over the p-type layer to reverse a carrier type of an n-type top mirror. Either the oxidation layer is on or in the p-type layer and the tunnel junction is on the oxidation layer, or the tunnel junction is on the p-type layer and the oxidation layer is on the tunnel junction. The VCSEL may include the n-type top mirror over the tunnel junction, a top contact layer over the n-type top mirror, and a top metal on the top contact layer.
    Type: Application
    Filed: September 30, 2020
    Publication date: November 25, 2021
    Inventors: Jun YANG, Guowei ZHAO, Matthew Glenn PETERS, Eric R. HEGBLOM, Ajit Vijay BARVE, Benjamin KESLER
  • Publication number: 20210344174
    Abstract: A method for fabricating an array of emitters may include providing a first metallization layer for a first set of emitters of a first channel, wherein the first metallization layer comprises a first interchannel portion positioned between the first set of emitters and a second set of emitters of a second channel. The method may include depositing a dielectric layer on the first interchannel portion of the first metallization layer. The method may include providing a second metallization layer for the second set of emitters, wherein the second metallization layer comprises a second interchannel portion positioned between the first set of emitters and the second set of emitters, and wherein the second interchannel portion of the second metallization layer at least partially overlaps the first interchannel portion of the first metallization layer.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 4, 2021
    Inventors: Ajit Vijay BARVE, Matthew Glenn PETERS, Eric R. HEGBLOM
  • Publication number: 20200388986
    Abstract: A device includes a substrate, a vertical cavity surface emitting laser (VCSEL) array on top of the substrate, a via through the substrate and the VCSEL array, a first electrode extended from a top of the VCSEL array to a bottom of the substrate, through the via, the first electrode electrically connected to the VCSEL array, a second electrode on the bottom of the substrate, the second electrode electrically connected to the VCSEL array, and an isolator in the via providing electrical isolation between the first electrode and the second electrode.
    Type: Application
    Filed: September 30, 2019
    Publication date: December 10, 2020
    Inventor: Matthew Glenn PETERS
  • Publication number: 20200106245
    Abstract: A closely spaced emitter array may include a first emitter comprising a first plurality of structures and a second emitter, adjacent to the first emitter, comprising a second plurality of structures. The first emitter and the second emitter may be configured in the closely spaced emitter array such that different types of structures between the first plurality of structures and the second plurality of structures do not overlap while maintaining close spacing between the first emitter and the second emitter.
    Type: Application
    Filed: November 14, 2019
    Publication date: April 2, 2020
    Inventors: Ajit Vijay BARVE, Benjamin Kesler, Matthew Glenn Peters
  • Patent number: 10490967
    Abstract: The invention relates to bi-directional long-cavity semiconductor lasers for high power applications having two AR coated facets (2AR) to provide an un-folded cavity with enhanced output power. The lasers exhibit more uniform photon and carrier density distributions along the cavity than conventional uni-directional high-power lasers, enabling longer lasers with greater output power and lasing efficiency due to reduced longitudinal hole burning. Optical sources are further provided wherein radiation from both facets of several 2AR lasers that are disposed at vertically offset levels is combined into a single composite beam.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: November 26, 2019
    Assignee: Lumentum Operations LLC
    Inventors: Abdullah Demir, Matthew Glenn Peters
  • Publication number: 20190237940
    Abstract: An emitter array, may comprise a first set of emitters that has a nominal optical output power at an operating voltage. The emitter array may comprise a second set of emitters that has substantially less than the nominal optical output power or no optical output power at the operating voltage. The first set of emitters and the second set of emitters may be interleaved with each other to form a two-dimensional regular pattern of emitters that emits a random pattern of light at the nominal optical output power at the operating voltage. The first set of emitters and the second set of emitters may be electrically connected in parallel.
    Type: Application
    Filed: January 7, 2019
    Publication date: August 1, 2019
    Inventors: Vincent V. WONG, Jay A. SKIDMORE, Matthew Glenn PETERS
  • Publication number: 20190148918
    Abstract: A die may comprise a plurality of adjacent emitters and a potential dislocation line. The plurality of adjacent emitters and the potential dislocation line may be offset from each other within a range of angles based on a relative rotation of the plurality of adjacent emitters and the potential dislocation line.
    Type: Application
    Filed: September 28, 2018
    Publication date: May 16, 2019
    Inventors: Matthew Glenn Peters, David Venables, Eric R. Hegblom, Ajit Vijay Barve
  • Patent number: 9647416
    Abstract: The invention relates to bi-directional long-cavity semiconductor lasers for high power applications having two AR coated facets (2AR) to provide an un-folded cavity with enhanced output power. The lasers exhibit more uniform photon and carrier density distributions along the cavity than conventional uni-directional high-power lasers, enabling longer lasers with greater output power and lasing efficiency due to reduced longitudinal hole burning. Optical sources are further provided wherein radiation from both facets of several 2AR lasers that are disposed at vertically offset levels is combined into a single composite beam.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: May 9, 2017
    Assignee: Lumentum Operations LLC
    Inventors: Abdullah Demir, Matthew Glenn Peters
  • Publication number: 20170093125
    Abstract: The invention relates to bi-directional long-cavity semiconductor lasers for high power applications having two AR coated facets (2AR) to provide an un-folded cavity with enhanced output power. The lasers exhibit more uniform photon and carrier density distributions along the cavity than conventional uni-directional high-power lasers, enabling longer lasers with greater output power and lasing efficiency due to reduced longitudinal hole burning. Optical sources are further provided wherein radiation from both facets of several 2AR lasers that are disposed at vertically offset levels is combined into a single composite beam.
    Type: Application
    Filed: September 30, 2016
    Publication date: March 30, 2017
    Inventors: Abdullah Demir, Matthew Glenn Peters
  • Publication number: 20150333472
    Abstract: The invention relates to bi-directional long-cavity semiconductor lasers for high power applications having two AR coated facets (2AR) to provide an un-folded cavity with enhanced output power. The lasers exhibit more uniform photon and carrier density distributions along the cavity than conventional uni-directional high-power lasers, enabling longer lasers with greater output power and lasing efficiency due to reduced longitudinal hole burning. Optical sources are further provided wherein radiation from both facets of several 2AR lasers that are disposed at vertically offset levels is combined into a single composite beam.
    Type: Application
    Filed: December 23, 2013
    Publication date: November 19, 2015
    Applicant: JDS Uniphase Corporation
    Inventors: Abdullah Demir, Matthew Glenn Peters
  • Patent number: 7602828
    Abstract: The invention relates to high power broad-area semiconductor lasers incorporating a structure that provides both gain guiding and index guiding. The lateral width of the index guiding region is greater than the lateral width of the gain guiding region by at least 20 micron. This results in a high power broad-area semiconductor laser which has reduced lateral divergence of the output beam.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: October 13, 2009
    Assignee: JDS Uniphase Corporation
    Inventors: Victor Rossin, Matthew Glenn Peters, Erik Paul Zucker
  • Patent number: 7567603
    Abstract: The invention relates to a semiconductor laser diode structure with increased catastrophic optical damage (COD) power limit, featuring three sections, sometimes called windows, at the output facet of the diode. These include an optically transparent section, a current blocking section and a partially current blocking section.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: July 28, 2009
    Assignee: JDS Uniphase Corporation
    Inventors: Matthew Glenn Peters, Victor Rossin, Erik Paul Zucker