Patents by Inventor Matthew Holliman

Matthew Holliman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9189237
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9189238
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9182987
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9182985
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9182988
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9170815
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: October 27, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9170814
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: October 27, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9152420
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: October 6, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Patent number: 8510355
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: August 13, 2013
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130185541
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: March 7, 2013
    Publication date: July 18, 2013
    Inventors: YEN-KUANG CHEN, WILLIAM MACY, JR., MATTHEW HOLLIMAN, ERIC DEBES, MINERVA YEUNG
  • Publication number: 20130159672
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: January 29, 2013
    Publication date: June 20, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130145125
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: January 29, 2013
    Publication date: June 6, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, JR., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130145120
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: January 29, 2013
    Publication date: June 6, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130138917
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: January 29, 2013
    Publication date: May 30, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, JR., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130124824
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: December 27, 2012
    Publication date: May 16, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130061024
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: November 5, 2012
    Publication date: March 7, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, JR., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20130061025
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: November 5, 2012
    Publication date: March 7, 2013
    Inventors: Yen-Kueng Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20110035426
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: October 19, 2010
    Publication date: February 10, 2011
    Inventors: Yen-Kuang Chen, William W. Macy, JR., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Patent number: 7818356
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Young
  • Publication number: 20060115112
    Abstract: Systems and methods are provided through which marks are generated for combination with a host image, in which source or user information is encoded into the mark either as a visually perceptibly unobtrusive pattern, or encoded by an arrangement of visually perceptible marks. Systems and methods are also provided for decoding or estimating the user information from images that contain the marks and determining the user or source that the mark indicates within a measure of certainty.
    Type: Application
    Filed: January 17, 2006
    Publication date: June 1, 2006
    Inventors: Minerva Yeung, Mathew Taylor, Matthew Holliman