Abstract: A computer-implemented method and system for monitoring activities in industrial sites using data models is presented.

Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.

Abstract: A screen assembly, such as a downhole/sand screen assembly, comprising first and second screen portions or screens longitudinally coupled together, wherein there is provided a fluid flow path between the first and second screen portions or screen. Optionally, the first and second sleeves are coupled or connected by a centralizer or further sleeve or screen, and/or optionally by or via first and second support ring.

Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.

Abstract: An anti-theft RFID system for monitoring the presence of a plurality of tagged items includes an RFID reader including an antenna and being configured to transmit an interrogating signal to the RFID tags and retrieve data; a processor configured to process the data that the RFID reader retrieves from the RFID tags; and a display connected to the processor and configured to display a result processed by the processor. The processor is configured to update a first counter value indicating the number of tagged items located within a predefined area and to update a second counter value indicating the number of tagged items being taken away from the predefined area. The display is configured to display the values of the first and the second counters and thereby to assist an operator to determine the occurrence of a security event by analyzing the values of the first and the second counters.

Abstract: A downhole arrangement (32) comprises first (34) and second (41) members, a lock profile (4) fixed relative to one of the first and second members, and a lock member (10) for engaging the at least one lock profile. A release member (40) is provided which is moveable to selectively lock the lock member in engagement with the lock profile so as to selectively secure the second member relative to the first member. Such a downhole arrangement may permit a releasable connection between the first and second members.

Abstract: An anti-theft RFID system for monitoring the presence of a plurality of tagged items includes an RFID reader including an antenna and being configured to transmit an interrogating signal to the RFID tags and retrieve data; a processor configured to process the data that the RFID reader retrieves from the RFID tags; and a display connected to the processor and configured to display a result processed by the processor. The processor is configured to update a first counter value indicating the number of tagged items located within a predefined area and to update a second counter value indicating the number of tagged items being taken away from the predefined area. The display is configured to display the values of the first and the second counters and thereby to assist an operator to determine the occurrence of a security event by analyzing the values of the first and the second counters.

Abstract: A downhole actuator (30) comprises a tubular housing (34) which includes an indexing profile (42) on an inner surface thereof, and an indexing sleeve (46) mounted within the housing (34). The indexing sleeve (46) comprises an engaging arrangement including first and second axially spaced engagement members (52, 54) which cooperate with the indexing profile (42) of the housing (34) to be sequentially engaged by an actuation object (48) passing through a central bore (50) of the indexing sleeve (46) to drive the indexing sleeve (46) one discrete step of movement through the housing (34) towards an actuation site.

Abstract: A screen assembly, such as a downhole/sand screen assembly, comprising first and second screen portions or screens longitudinally coupled together, wherein there is provided a fluid flow path between the first and second screen portions or screen. Optionally, the first and second sleeves are coupled or connected by a centralizer or further sleeve or screen, and/or optionally by or via first and second support ring.

Abstract: A downhole tool (32) comprises a tool housing (34) defining a central bore (35) and including a fluid port (20), and a valve member (40) mounted within the housing (34) and being movable from a closed position in which the fluid port (20) is blocked to an open position in which the fluid port (20) is opened. The tool (32) further comprises a catching arrangement (41) mounted within the housing (34) and comprising one or more radially movable seat members (106), and being configurable from a free configuration in which the seat members (106) permit an object (48) to pass through the tool (32), to a catching configuration in which the seat members (106) catch an object (48) passing through the tool (32).

Abstract: A downhole tool (32) comprises a tool housing (34) defining a central bore (35) and including a fluid port (20), and a valve member (40) mounted within the housing (34) and being moveable from a closed position in which the fluid port (20) is blocked to an open position in which the fluid port (20) is opened. The tool (32) further comprises a catching arrangement (41) mounted within the housing (34) and comprising one or more radially moveable seat members (106), and being configurable from a free configuration in which the seat members (106) permit an object (48) to pass through the tool (32), to a catching configuration in which the seat members (106) catch an object (48) passing through the tool (32).

Abstract: A clock timing adjust circuit is incorporated in a clocked integrated circuit to detect an input clock frequency and to adjust the timing latency of an internal control signal for accessing a memory element in the clocked integrated circuit. The clock timing adjust circuit introduces an adjustable timing latency to an internal control signal derived from the command signal. The clock timing adjust circuit operates to adjust the timing latency of the control signal to cause clock based operations to either be advanced or delayed by one or more clock cycles in response to the clock frequency detection. In one embodiment, the clock timing adjust circuit includes a clock frequency detect circuit and a latency adjust circuit. The clock timing adjust circuit can operate at both high and low clock frequencies to ensure that undesired data collision events are obviated without introducing unnecessary delays.

Abstract: A downhole actuator (30) comprises a tubular housing (34) which includes an indexing profile (42) on an inner surface thereof, and an indexing sleeve (46) mounted within the housing (34). The indexing sleeve (46) comprises an engaging arrangement including first and second axially spaced engagement members (52, 54) which cooperate with the indexing profile (42) of the housing (34) to be sequentially engaged by an actuation object (48) passing through a central bore (50) of the indexing sleeve (46) to drive the indexing sleeve (46) one discrete step of movement through the housing (34) towards an actuation site.

Abstract: A downhole tool (32) comprises a tool housing (34) defining a central bore (35) and including a fluid port (20), and a valve member (40) mounted within the housing (34) and being moveable from a closed position in which the fluid port (20) is blocked to an open position in which the fluid port (20) is opened. The tool (32) further comprises a catching arrangement (41) mounted within the housing (34) and comprising one or more radially moveable seat members (106), and being configurable from a free configuration in which the seat members (106) permit an object (48) to pass through the tool (32), to a catching configuration in which the seat members (106) catch an object (48) passing through the tool (32).

Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.

Abstract: A clock timing adjust circuit is incorporated in a clocked integrated circuit to detect an input clock frequency and to adjust the timing latency of an internal control signal for accessing a memory element in the clocked integrated circuit. The clock timing adjust circuit introduces an adjustable timing latency to an internal control signal derived from the command signal. The clock timing adjust circuit operates to adjust the timing latency of the control signal to cause clock based operations to either be advanced or delayed by one or more clock cycles in response to the clock frequency detection. In one embodiment, the clock timing adjust circuit includes a clock frequency detect circuit and a latency adjust circuit. The clock timing adjust circuit can operate at both high and low clock frequencies to ensure that undesired data collision events are obviated without introducing unnecessary delays.