Abstract: A flexible electronic circuit includes a shape memory material disposed within a flexible dielectric material.

Abstract: A method of fabricating a printed circuit board (PCB) is presented. The PCB includes a glass security layer. The method includes forming the glass security layer upon a PCB wiring layer. The method includes optically attaching an optical electromagnetic radiation (EM) emitter upon the glass security layer. The method includes optically attaching an optical EM receiver upon the glass security layer. The method further includes electrically connecting an optical monitor device to the optical EM receiver.

Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

Abstract: A method of probing printed circuit boards that includes providing a circuit board design including a plurality of probe points, and selecting a probe point including a location ink from the plurality of probe points in the circuit board design to be probed on a physical printed circuit board design. The method continues with probing at least one probe point of the plurality of probe points with a probe that activates the location ink. Activation of the location ink by the probe indicates the selected probe point including the locating ink.

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Abstract: A security apparatus that can detect unauthorized alterations of physical arrangement of a computing system or unauthorized movements of a computing system through the use of acoustic signals is designed. Modules of a computing system including the security apparatus are able to generate acoustic measurements from received returned acoustic signals. Also, the modules are able to derive baseline acoustic measurements based on stored acoustic profiles. If, for any module of the computing system, its generated acoustic measurements do not substantially match its baseline acoustic measurements, the mismatch may indicate that there is an unauthorized alteration of physical arrangement of the computing system or an unauthorized movement of the computing system. Thus, the security apparatus in the module may take actions to prevent access to the sensitive data stored in the module.

Abstract: A method and system are provided for implementing user configurable probing with magnetic connections and printed circuit board (PCB) features. A first magnet is located at a desired probe point on the PCB, a probe having a second magnet of suitable polarity and an electrical contact is moved to the probe point. The first and second magnets attract each other, and the probe point makes electrical contact with an electrical conductor at the probe point.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill vias during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a plug is inserted into each via and the plug is lowered to a depth just below a desired signal trace layer. A thin anti-electroplate coating is applied onto the walls of the via below the signal trace. Then the plugs are removed and a standard board plating process for the PCB is performed.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a via plug with a specialized geometry and including a capillary is inserted into each via to allow electroplating on only preferred wall surfaces of the vias. Then a board plating process of the PCB manufacturing is performed.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a via plug with a specialized geometry and including a capillary is inserted into each via to allow electroplating on only preferred wall surfaces of the vias. Then a board plating process of the PCB manufacturing is performed.

Abstract: Embodiments herein describe RFID systems that include multiple RFID tag readers that each use a different frequency to communicate with an RFID tag. For example, each of the tag readers may transmit a tag query command using different modulated frequencies. In one embodiment, the RFID tag includes multiple receivers each tuned to one of the different frequencies generated by the tag readers. For example, one receiver in the tag is tuned to receive 200 MHz signals while another receiver is tuned to receive 900 MHz signals. To provide location information, the RFID tag compares power values associated with the received signals to determine which of the RFID tag readers is closest to the tag. The RFID tag conveys this location information to the tag readers by selecting one of the frequencies of the tag readers to use when generating a reply message.

Abstract: A bus communicates bits in parallel between a transmitter and receiver. A selected set of bits has its bits scrambled. Scrambling the bits includes assigning two or more bits of the selected set of bits to atypical lanes of the bus. By scrambling the bits, the order in which the bits of the selected set of bits are ready by a processer are obscured. The set of bits is transmitted to the receiver with one or more delays. The delays are on one or more of the lanes of the bus. The delays indicate the order of the bits. The receiver is configured to use the delays to identify the order of the bits and unscramble the set of bits.

Abstract: A conductor on glass security layer may be located within a printed circuit board (PCB) of a crypto adapter card or within a daughter card upon the crypto adapter card. The conductor on glass security layer includes a glass dielectric layer that remains intact in the absence of point force loading and shatters when a point load punctures or otherwise contacts the glass dielectric layer. The conductor on glass security layer also includes a conductive security trace upon the glass dielectric layer. A physical access attempt shatters a majority of the glass dielectric layer, which in turn fractures the security trace. A monitoring circuit that monitors the resistance of the conductive security trace detects the resultant open circuit or change in security trace resistance and initiates a tamper signal that which may be received by one or more computer system devices to respond to the unauthorized attempt of physical access.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill vias during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a plug is inserted into each via and the plug is lowered to a depth just below a desired signal trace layer. A thin anti-electroplate coating is applied onto the walls of the via below the signal trace. Then the plugs are removed and a standard board plating process for the PCB is performed.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill vias during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a plug is inserted into each via and the plug is lowered to a depth just below a desired signal trace layer. A thin anti-electroplate coating is applied onto the walls of the via below the signal trace. Then the plugs are removed and a standard board plating process for the PCB is performed.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a via plug with a specialized geometry and including a capillary is inserted into each via to allow electroplating on only preferred wall surfaces of the vias. Then a board plating process of the PCB manufacturing is performed.

Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill vias during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a plug is inserted into each via and the plug is lowered to a depth just below a desired signal trace layer. A thin anti-electroplate coating is applied onto the walls of the via below the signal trace. Then the plugs are removed and a standard board plating process for the PCB is performed.

Abstract: Embodiments of the present disclosure provide methods and apparatus for providing feed forward equalization to a communication line by providing a resistance and a capacitance to the communication line. The method includes determining the resistance based on a desired value of feed forward equalization to provide to a communication line, determining the capacitance based on the desired value of feed forward equalization to provide to the communication line, providing a layer of resistive material between a first conductor and a second conductor of the communication line, wherein a dimension of the layer of resistive material is determined based on the determined resistance and providing a layer of dielectric material between the first conductor and the second conductor, wherein a dimension of the layer of dielectric material is determined based on the determined capacitance.

Abstract: Embodiments herein describe RFID systems that include multiple RFID tag readers that each use a different frequency to communicate with an RFID tag. For example, each of the tag readers may transmit a tag query command using different modulated frequencies. In one embodiment, the RFID tag includes multiple receivers each tuned to one of the different frequencies generated by the tag readers. For example, one receiver in the tag is tuned to receive 200 MHz signals while another receiver is tuned to receive 900 MHz signals. To provide location information, the RFID tag compares power values associated with the received signals to determine which of the RFID tag readers is closest to the tag. The RFID tag conveys this location information to the tag readers by selecting one of the frequencies of the tag readers to use when generating a reply message.