Patents by Inventor Matty Caymax

Matty Caymax has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060086950
    Abstract: The present invention is related to a method for making a passivated semiconductor substrate comprising the steps of providing a substrate surface comprising or consisting of mono-crystalline semiconductor material other than silicon and forming a silicon layer on the substrate surface, such that the silicon layer is substantially lattice matched to the mono-crystalline semiconductor material. It is also related to a semiconductor substrate passivated according to the method.
    Type: Application
    Filed: October 13, 2005
    Publication date: April 27, 2006
    Inventors: Matty Caymax, Renaud Bonzom, Frederik Leys, Marc Meuris
  • Patent number: 6884636
    Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: April 26, 2005
    Assignee: Interuniversitair Micro-Elektronica Centrum (IMEC,vzw)
    Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
  • Publication number: 20050012040
    Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.
    Type: Application
    Filed: August 17, 2004
    Publication date: January 20, 2005
    Applicant: Interuniversitair Micro-Elektronica Centrum (IMEC,vzw), a Belgium company
    Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
  • Patent number: 6815247
    Abstract: A thin-film opto-electronic device on a conductive silicon-containing substrate includes a sequence of layers. The layers include a layer of a porous medium preferably a porous silicon, on a substrate. The porous layer has both light diffusing and light reflecting properties. In addition, a non-porous layer is located on said porous silicon layer, with at least one first region and at least one second region being in said non-porous layer. The first region is of a first conductivity type acting as a light absorber and the second region has a conductivity of a second type, different from said first conductivity type. The sequence of layers is such that optical confinement is realised in the device.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: November 9, 2004
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Lieven Stalmans, Jef Poortmans, Matty Caymax, Khalid Said, Johan Nijs
  • Publication number: 20040087056
    Abstract: A thin-film opto-electronic device on a conductive silicon-containing substrate includes a sequence of layers. The layers include a layer of a porous medium preferably a porous silicon, on a substrate. The porous layer has both light diffusing and light reflecting properties. In addition, a non-porous layer is located on said porous silicon layer, with at least one first region and at least one second region being in said non-porous layer. The first region is of a first conductivity type acting as a light absorber and the second region has a conductivity of a second type, different from said first conductivity type. The sequence of layers is such that optical confinement is realised in the device.
    Type: Application
    Filed: August 19, 2003
    Publication date: May 6, 2004
    Inventors: Lieven Stalmans, Jef Poortmans, Matty Caymax, Khalid Said, Johan Nijs
  • Patent number: 6683367
    Abstract: The present invention is related to a thin-film opto-electronic device and a method of fabricating the same. Particularly this thin film opto-electronic device is fabricated on a Si-containing substrate. The thin-film material is a crystalline semiconductor material. In order to increase the efficiency of this device a porous silicon layer is applied between the thin-film and the substrate. This porous silicon layer has both light reflecting and light diffusing properties thereby giving rise to light confinement in the thin-film.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: January 27, 2004
    Assignee: IMEC vzw
    Inventors: Lieven Stalmans, Jef Poortmans, Matty Caymax, Khalid Said, Johan Nijs
  • Publication number: 20030124761
    Abstract: Method and apparatus to obtain as-deposited polycrystalline and low-stress SiGe layers. These layers may be used in Micro Electro-Mechanical Systems (MEMS) devices or micromachined structures. Different parameters are analysed which effect the stress in a polycrystalline layer. The parameters include, without limitation: deposition temperature; concentration of semiconductors (e.g., the concentration of Silicon and Germanium in a SixGe1−x layer, with x being the concentration parameter); concentration of dopants (e.g., the concentration of Boron or Phosphorous); amount of pressure; and use of plasma. Depending on the particular environment in which the polycrystalline SiGe is grown, different values of parameters may be used.
    Type: Application
    Filed: October 3, 2002
    Publication date: July 3, 2003
    Inventors: Kris Baert, Matty Caymax, Cristina Rusu, Sherif Sedky, Ann Witvrouw
  • Publication number: 20010055833
    Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.
    Type: Application
    Filed: May 18, 2001
    Publication date: December 27, 2001
    Applicant: Interuniversitair Micro-Elektronica Centrum (IMEC, vzw).
    Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
  • Patent number: 6274462
    Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: August 14, 2001
    Assignee: Interuniversitair Micro-Elektronica Centrum (IMEC, vzw)
    Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
  • Patent number: 6194722
    Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: February 27, 2001
    Assignee: Interuniversitair Micro-Elektronica Centrum, IMEC, vzw
    Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert