Patents by Inventor Maurice Heathcote Norcott
Maurice Heathcote Norcott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20100052715Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: March 4, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20100045320Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: February 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20100045318Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: February 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20100045324Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: February 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20100045266Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: February 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20100045321Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: February 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20100045317Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: February 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20090315579Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: August 27, 2009Publication date: December 24, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Patent number: 7538565Abstract: A high density test probe which provides an apparatus for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer.Type: GrantFiled: August 25, 1999Date of Patent: May 26, 2009Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20090128176Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: January 22, 2009Publication date: May 21, 2009Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shin, George Frederick Walker
-
Patent number: 7492008Abstract: A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.Type: GrantFiled: July 22, 2004Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Stephen Richard Fox, Neena Garg, Kenneth John Giewont, Junedong Lee, Siegfried Lutz Maurer, Dan Moy, Maurice Heathcote Norcott, Devendra Kumar Sadana
-
Publication number: 20080132094Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer.Type: ApplicationFiled: October 30, 2007Publication date: June 5, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080129320Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: June 5, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080129319Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: June 5, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080123310Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 29, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080121879Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving mi array of wires disposed in the elastomer and in electrical contact with the space transformer.Type: ApplicationFiled: October 31, 2007Publication date: May 29, 2008Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080116912Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080116913Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080116914Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
-
Publication number: 20080116916Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker