Patents by Inventor Mauro Mazzola
Mauro Mazzola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145351Abstract: A semiconductor die is arranged on a first surface of a leadframe having a first thickness between the first surface and a second surface opposite the first surface and an array of electrically conductive leads. Terminal recesses are provided in the electrically conductive leads in the array at the first surface. At the terminal recesses, the electrically conductive leads have a second thickness less than the first thickness. The semiconductor die is coupled with the electrically conductive leads via wires or ribbons having ends coupled to the electrically conductive leads arranged in the terminal recesses. The leadframe is partially cut starting from the second surface at the terminal recesses with a cutting depth between the first thickness and the second thickness. The partial cut produces exposed surfaces of the electrically conductive leads and the ends of the electrically conductive elongated formations providing wettable flanks for solder material.Type: ApplicationFiled: October 27, 2023Publication date: May 2, 2024Applicant: STMicroelectronics S.r.l.Inventors: Matteo DE SANTA, Mauro MAZZOLA
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Publication number: 20240145355Abstract: A leadframe includes a die pad and electrically conductive leads arranged peripherally of the die pad. A semiconductor die is mounted to the die pad. The die is electrically coupled to the electrically conductive leads using an electrical coupling member applied onto the semiconductor die. The electrical coupling member includes a planar body configured to cover the semiconductor die and the electrically conductive leads. The planar body of the electrical coupling member includes strip-like, electrically conductive formations embedded in an electrically insulating material. Each strip-like, electrically conductive formation has a first end configured to contact the semiconductor die and a second end configured to contact the electrically conductive lead.Type: ApplicationFiled: November 1, 2023Publication date: May 2, 2024Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Patent number: 11967544Abstract: In providing electrical wire-like connections between at least one semiconductor die arranged on a semiconductor die mounting area of a substrate and an array of electrically-conductive leads in the substrate, pressure force is applied to the electrically-conductive leads in the substrate during bonding the wire-like connections to the electrically-conductive leads. Such a pressure force is applied to the electrically-conductive leads in the substrate via a pair of mutually co-operating force transmitting surfaces. These surfaces include a first convex surface engaging a second concave surface.Type: GrantFiled: May 19, 2021Date of Patent: April 23, 2024Assignee: STMicroelectronics S.r.l.Inventors: Mauro Mazzola, Matteo De Santa
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Publication number: 20230245955Abstract: A semiconductor device includes an electrically conductive clip arranged in a bridge-like position between a semiconductor integrated circuit chip and an electrically conductive pad of a leadframe. The electrically conductive clip is soldered to the semiconductor integrated circuit chip and to the electrically conductive pad via soldering material applied at coupling surfaces facing towards the semiconductor integrated circuit chip and the electrically conductive pad. Prior to soldering, the clip is immobilized in the desired bridge-like position via one of welding (such as laser welding) or gluing at dedicated immobilization areas.Type: ApplicationFiled: January 26, 2023Publication date: August 3, 2023Applicant: STMicroelectronics S.r.l.Inventors: Mauro MAZZOLA, Fabio MARCHISI
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Publication number: 20230245994Abstract: A semiconductor device semiconductor chip mounted to a leadframe that includes an electrically conductive pad. An electrically conductive clip is arranged in a bridge-like position between the semiconductor chip and the electrically conductive pad. The electrically conductive clip is soldered to the semiconductor chip and to the electrically conductive pad via soldering material applied at coupling surfaces facing towards the semiconductor chip and the electrically conductive pad. The device further includes a pair of complementary positioning formations formed by a cavity in the electrically conductive clip and a protrusion (such as a stud bump or a stack of stud bumps) formed in the electrically conductive pad. The complementary positioning formations are mutually engaged to retain the electrically conductive clip in the bridge-like position to avoid displacement during soldering.Type: ApplicationFiled: January 27, 2023Publication date: August 3, 2023Applicant: STMicroelectronics S.r.l.Inventors: Mauro MAZZOLA, Fabio MARCHISI
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Publication number: 20230114535Abstract: A semiconductor die and an electrically conductive ribbon are arranged on a substrate. The electrically conductive ribbon includes a roughened surface. An insulating encapsulation is molded onto the semiconductor die and the electrically conductive ribbon. The roughened surface of the electrically conductive ribbon provides a roughened coupling interface to the insulating encapsulation.Type: ApplicationFiled: October 4, 2022Publication date: April 13, 2023Applicant: STMicroelectronics S.r.l.Inventors: Matteo DE SANTA, Mauro MAZZOLA
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Publication number: 20230049088Abstract: A semiconductor device includes a pre-molded leadframe mounting substrate. The substrate includes a die pad (configured to have a semiconductor die mounted thereon) and a first electrically conductive pad and a second electrically conductive pad. A strip of insulating material is molded between the first and second electrically conductive pads to provide a mutually electrically insulation and extends in a longitudinal direction with the first electrically conductive pad and the second electrically conductive pad lying on opposite sides of the strip of insulating material. A semiconductor die is arranged on the die pad in register with the strip of insulating material. A single electrically conductive ribbon extending in register with the strip of insulating material electrically couples the semiconductor die with both the first and second electrically conductive pads to provide a common current flow path from the semiconductor die towards the first and the second electrically conductive pads.Type: ApplicationFiled: August 5, 2022Publication date: February 16, 2023Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Publication number: 20230031682Abstract: A pre-molded substrate for semiconductor devices includes a sculptured electrically conductive (e.g., copper) laminar structure having spaces therein. The laminar structure includes one or more die pads having a first die pad surface configured to have semiconductor chips mounted thereon. A pre-mold material molded onto the laminar structure penetrates into the spaces therein and provides a laminar pre-molded substrate including the first die pad surface left exposed by the pre-mold material with the die pad(s) bordering on the pre-mold material. One or more stress-relief curved portions are provided at the periphery of one or more of the die pads. The stress-relief curved portions are configured to border on the pre-mold material over a smooth surface to effectively counter the formation of cracks in the pre-mold material as a result of the pre-molded substrate being bent.Type: ApplicationFiled: July 21, 2022Publication date: February 2, 2023Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Publication number: 20230031356Abstract: A pre-molded leadframe includes a laminar structure having empty spaces therein and a first thickness with a die pad having opposed first and second die pad surfaces. Insulating pre-mold material is molded onto the laminar structure. The pre-mold material penetrates the empty spaces and provides a laminar pre-molded substrate having the first thickness with the first die pad surface left exposed. The die pad has a second thickness that is less than the first thickness. One or more pillar formations are provided protruding from the second die pad surface to a height equal to a difference between the first and second thicknesses. With the laminar structure clamped between surfaces of a mold, the first die pad surface and pillar formations abut against the mold surfaces. The die pad is thus effectively clamped between the clamping surfaces countering undesired flashing of the pre-mold material over the first die pad surface.Type: ApplicationFiled: July 26, 2022Publication date: February 2, 2023Applicant: STMicroelectronics S.r.l.Inventors: Mauro MAZZOLA, Roberto TIZIANI
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Publication number: 20230031422Abstract: A pre-molded substrate includes a sculptured, electrically conductive laminar structure having spaces therein. The laminar structure includes a die pad having a first die pad surface configured to mount a semiconductor chip. A pre-mold material molded onto the laminar structure penetrates into the spaces and provides a laminar pre-molded substrate with the first die pad surface left exposed. The peripheral edge of the die pad includes an alternation of first and second anchoring formations to the pre-mold material. The first anchoring formations counter first detachment forces inducing displacement of the die pad with respect to the pre-mold material in a first direction from the second die pad surface to the first die pad surface. The second anchoring formations counter second detachment forces inducing displacement of the die pad with respect to the pre-mold material in a second direction from the first die pad surface to the second die pad surface.Type: ApplicationFiled: July 22, 2022Publication date: February 2, 2023Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Patent number: 11557547Abstract: A leadframe for semiconductor devices, the leadframe comprising a die pad portion having a first planar die-mounting surface and a second planar surface opposed the first surface, the first surface and the second surface having facing peripheral rims jointly defining a peripheral outline of the die pad wherein the die pad comprises at least one package molding compound receiving cavity opening at the periphery of said first planar surface.Type: GrantFiled: December 18, 2020Date of Patent: January 17, 2023Assignee: STMicroelectronics S.r.l.Inventors: Roberto Tiziani, Mauro Mazzola
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Publication number: 20230005825Abstract: Semiconductor chips to be singulated to individual semiconductor devices are arranged onto respective adjacent areas of a mounting substrate such as a pre-molded leadframe. The mounting substrate is made of a laminar, electrically conductive sculptured structure with molded electrically insulating material. Electrically conductive side formations in the adjacent areas of the mounting substrate include first and second pads at front and back surfaces, respectively, of the mounting substrate. The first contact pads at the front surface of the substrate include narrowed portions having side recesses. The second contact pads at the back surface of the substrate include widened portions having side extensions adjacent the side recesses. The electrically insulating material extends into the side recesses to provide anchoring formations of the insulating material to the electrically conductive sculptured structure of the mounting substrate.Type: ApplicationFiled: June 24, 2022Publication date: January 5, 2023Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Publication number: 20230005824Abstract: Pre-molded leadframes for semiconductor devices are manufactured by molding electrically insulating material onto a laminar sculptured structure of electrically conductive material including semiconductor device component die pads. First and second die pads are coupled via a first extension from the first die pad and a second extension from the second die pad at neighboring locations on the front surface of the leadframe and a bridge formation coupling the first and second extensions at the bacpk surface of the leadframe. The bridge formation provides a sacrificial connection between the first and second extensions which is selectively removed after molding the electrically insulating material in order to decouple the first and second die pads from each other. The removal of the sacrificial connection leaves a cavity formed at the second surface of the leadframe without affecting the shape of the die pads.Type: ApplicationFiled: June 24, 2022Publication date: January 5, 2023Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Publication number: 20220199500Abstract: A leadframe includes a pattern of electrically-conductive formations with one or more sacrificial connection formations extending bridge-like between a pair of electrically-conductive formations. The sacrificial connection formation or formations are formed at one of the first surface and the second surface of the leadframe and have a thickness less than the leadframe thickness between the first surface and the second surface. A filling of electrically-insulating material is molded between the electrically-conductive formations of the leadframe, with electrically-insulating material molded between the connection formation(s) and the other surface of the leadframe. The sacrificial connection formation(s) counter deformation and displacement of parts during formation and pre-molding of the leadframe.Type: ApplicationFiled: December 14, 2021Publication date: June 23, 2022Applicant: STMicroelectronics S.r.l.Inventors: Mauro MAZZOLA, Roberto TIZIANI
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Publication number: 20210375726Abstract: In providing electrical wire-like connections between at least one semiconductor die arranged on a semiconductor die mounting area of a substrate and an array of electrically-conductive leads in the substrate, pressure force is applied to the electrically-conductive leads in the substrate during bonding the wire-like connections to the electrically-conductive leads. Such a pressure force is applied to the electrically-conductive leads in the substrate via a pair of mutually co-operating force transmitting surfaces. These surfaces include a first convex surface engaging a second concave surface.Type: ApplicationFiled: May 19, 2021Publication date: December 2, 2021Applicant: STMicroelectronics S.r.l.Inventors: Mauro MAZZOLA, Matteo DE SANTA
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Publication number: 20210193591Abstract: A leadframe for semiconductor devices, the leadframe comprising a die pad portion having a first planar die-mounting surface and a second planar surface opposed the first surface, the first surface and the second surface having facing peripheral rims jointly defining a peripheral outline of the die pad wherein the die pad comprises at least one package molding compound receiving cavity opening at the periphery of said first planar surface.Type: ApplicationFiled: December 18, 2020Publication date: June 24, 2021Applicant: STMicroelectronics S.r.l.Inventors: Roberto TIZIANI, Mauro MAZZOLA
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Patent number: 10872845Abstract: A process for manufacturing a semiconductor flip chip package and a corresponding flip chip package. The process comprises associating conducting bump pads to a face corresponding to an active side of one or more electronic dice, flipping the one or more electronic dice so that said face corresponding to an active side of one or more electronic dies is facing a leadframe carrying contacting pads in correspondence of said conducting bump pads, bonding said contacting pads to said conducting bump pads and encasing said one or more electronic dice in a casing by a molding operation. The process includes providing a leadframe having contacting pads presenting a recessed surface in correspondence of the position of said conducting bump pads.Type: GrantFiled: June 13, 2018Date of Patent: December 22, 2020Assignee: STMICROELECTRONICS S.R.L.Inventors: Mauro Mazzola, Matteo De Santa, Battista Vitali
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Patent number: 10741415Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.Type: GrantFiled: November 19, 2018Date of Patent: August 11, 2020Assignee: STMICROELECTRONICS S.r.l.Inventors: Mauro Mazzola, Battista Vitali, Matteo De Santa
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Publication number: 20190088503Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.Type: ApplicationFiled: November 19, 2018Publication date: March 21, 2019Inventors: Mauro Mazzola, Battista Vitali, Matteo De Santa
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Publication number: 20180374780Abstract: A process for manufacturing a semiconductor flip chip package and a corresponding flip chip package. The process comprises associating conducting bump pads to a face corresponding to an active side of one or more electronic dice, flipping the one or more electronic dice so that said face corresponding to an active side of one or more electronic dies is facing a leadframe carrying contacting pads in correspondence of said conducting bump pads, bonding said contacting pads to said conducting bump pads and encasing said one or more electronic dice in a casing by a molding operation. The process includes providing a leadframe having contacting pads presenting a recessed surface in correspondence of the position of said conducting bump pads.Type: ApplicationFiled: June 13, 2018Publication date: December 27, 2018Inventors: Mauro MAZZOLA, Matteo DE SANTA, Battista VITALI