Abstract: A manufacturing test system and method is presented for testing a computing system under test, which includes a computing device comprising internal emulation debug hardware and an emulation debug port through which the debug hardware is controlled. Manufacturing-level microprogram based functional tests are executed under the control of the internal emulation debug hardware of the computing device. A computing system probe applies the microprogram based functional test to the internal emulation debug hardware of the computing device via the emulation debug port. The manufacturing-level microprogram based functional test may be executed during at any level of computing device integration including the wafer, package, board, multi-chip module and system levels.

Abstract: A manufacturing and test simulation method for electronic circuit design integrated with computer aided design tools to provide concurrent engineering of manufacturing and testability aspects of a product concurrent with the functional design of a product. The manufacturing and test simulator (MTSIM) simulates manufacturing test and repair aspects of boards and multichip modules (MCMs) from design concept through manufacturing release to aid the designer in selecting appropriate trade-offs in the design for manufacturability and the design for testability. All simulation by the methods of the present invention applies manufacturing and test models down to the component level. The methods of the simulator include a new yield model for boards and MCMs which accounts for the clustering of solder defects. MTSIM models solder faults, manufacturing workmanship faults, component performance faults, and reliability faults.

Abstract: An improved design verification system for testing VLSI chips including an outer chassis with access hatches for servicing, removing and installing test circuitry. The chassis additionally incorporates an optics aperture and a manipulator interface which are used in conjunction with other test equipment such as wafer probers. A device-under-test (DUT) board for electromechanically positioning an integrated circuit device is electrically connected directly to a plurality of pin electronics (PE) boards through extended DUT board edge connectors. In addition to the direct DUT/PE boards connection, the PE boards are also directly connected to the backplane assembly through data edge connectors and power edge connectors.