Patents by Inventor Max N. Yoder

Max N. Yoder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5773933
    Abstract: A broadband, traveling wave amplifier which includes a target anode and an lectron gun for bombarding the anode with an electron beam having an amplitude proportional to that of an input signal. The electron gun includes a NEA semiconductor cold cathode having an electron emitting surface and a modulation structure for modulating the emitted electron beam with an input signal to be amplified. The electron gun and the anode are configured as parallel strip transmission lines having the same phase velocity. The target anode may be a reversed-biased stripline diode, Schottky barrier stripline diode, or metal/semiconductor/metal stripline structure.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: June 30, 1998
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5550425
    Abstract: A spark plug having a positive electrode spark tip which is covered with a ery thin layer (.ltoreq.20 nanometers) of very hard NEA material having very large chemical binding energies such that most elements, including carbon and nitrogen, will not bind to its surface. The NEA material may be sapphire, or may be an n-type impurity-doped semiconductor material such as n-type AlN, cBN, or GaAlN having a bandgap exceeding 5.5 eV.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: August 27, 1996
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5404835
    Abstract: A method of growing a large single crystalline diamond film, in which a nickel substrate is disposed within a diamond growth chamber. After air has been evacuated from the chamber and the substrate has been heated to a temperature exceeding 1145 Celsius, atomic hydrogen is continuously generated from hydrogen gas supplied to the chamber and accelerated toward the substrate, implanting hydrogen atoms in the top substrate surface and converting it to a liquid film of nickel hydride. Then one of two layers of diamond particles of two to three nanometer cross section is deposited on the liquid nickel hydride film, whereby the diamond particles arrange themselves on the liquid nickel hydride film to their lowest free energy state, forming a nascent contiguous single-crystalline diamond film. Thereafter diamond is homoepitaxially grown on the nascent contiguous single-crystalline diamond film to the desired thickness.
    Type: Grant
    Filed: November 8, 1994
    Date of Patent: April 11, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5363798
    Abstract: A method of synthesizing a large area, single crystalline, semiconductor wafer in which the semiconductor is grown on a substrate having a lower melting temperature and higher specific gravity than the overlying semiconductor. The substrate is disposed within an open container or holder having a drain plug. First, a very thin layer of semiconductor is grown on the substrate. Then, the temperature is raised to melt the substrate and anneal the very thin layer of semiconductor. Next, growth of the semiconductor film now floating on the molten substrate is resumed until the desired thickness is obtained. Then, the molten substrate is drained from the holder, the temperature lowered to room temperature, and the nascent large area semiconductor wafer removed from the holder.
    Type: Grant
    Filed: September 29, 1993
    Date of Patent: November 15, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5334853
    Abstract: A semiconductor cold electron emission device comprising a type I heterojunction formed of a P-type semiconductor mixture of AlN and a N-type semiconductor mixture of SiC which junction is forward biased so that electrons are monoenergetically emitted from the P-type semiconductor mixture.
    Type: Grant
    Filed: September 29, 1993
    Date of Patent: August 2, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5326992
    Abstract: A heterojunction bipolar transistor (HBT) structure is configured so that the heterojunction between hexagonal and cubic materials is electrically active. A first embodiment of the HBT structure comprises both hexagonal and cubic silicon carbide (SiC). The emitter region is fabricated from the higher bandgap hexagonal SiC appropriately doped. The base and collector regions are grown using the lower bandgap cubic SiC. A second embodiment of the HBT structure comprises both a solid solution of SiC material such as an alloy of silicon carbon aluminum nitrogen (SiCAlN) grown upon a substrate of hexagonal SiC. The emitter region can be placed either on the top or bottom of the second embodiment of the HBT structure. Also, the bandgap between the emitter and base regions of the second embodiment can be varied by controlling the mole fraction ratio between the constituent parts of the SiCAlN, i.e., between the SiC and the AlN.
    Type: Grant
    Filed: July 29, 1992
    Date of Patent: July 5, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5311055
    Abstract: Both homojunction and heterojunction bipolar transistor structures are fabricated in unique trenched configurations so as to better utilize their surface areas by employing both the vertical and horizontal portions of their base regions with equal effectiveness. An important advantage of the unique trenched configurations is that the base region of each trenched structure is of precisely the same thickness throughout--both vertical and horizontal portions. Consequently, the transit time for charge carriers to diffuse across the base region and the base transport factor are uniform because of the uniform base thickness. Moreover, the parasitic capacitance region of each trenched structure beneath base metallization contacts is only a small portion of the entire base-collector junction region.
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: May 10, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Alvin M. Goodman, Max N. Yoder
  • Patent number: 5281274
    Abstract: An apparatus for and a method of growing thin films of the elemental semiductors (group IVB), i.e., silicon, germanium, tin, lead, and, especially diamond, using modified atomic layer epitaxial (ALE) growth techniques are disclosed. In addition, stoichiometric and non-stoichiometric compounds of the group IVB elements are also grown by a variation of the method according to the present invention. The ALE growth of diamond thin films is carried-out, inter alia, by exposing a plurality of diamond or like substrates alternately to a halocarbon reactant gas, e.g., carbon tetrafluoride (CF.sub.4), and a hydrocarbon reactant gas, e.g., methane (CH.sub.4), at substrate temperatures between 300 and 650 Celsius. A stepping motor device portion of the apparatus is controlled by a programmable controller portion such that the surfaces of the plurality of substrates are given exposures of at least 10.sup.15 molecules/cm.sup.2 of each of the reactant gases.
    Type: Grant
    Filed: February 4, 1993
    Date of Patent: January 25, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5225366
    Abstract: An apparatus for and a method of growing thin films of the elemental semiconductors (group IVB), i.e., silicon, germanium, tin, lead, and, especially diamond, using modified atomic layer epitaxial (ALE) growth techniques are disclosed. In addition, stoichiometric and nonstoichiometric compounds of the group IVB elements are also grown by a variation of the method according to the present invention. The ALE growth of diamond thin films is carried-out, inter alia, by exposing a plurality of diamond or like substrates alternately to a halocarbon reactant gas, e.g., carbon tetrafluoride (CF.sub.4), and a hydrocarbon reactant gas, e.g., methane (CH.sub.4), at substrate temperatures between 300 and 650 Celsius. A stepping motor device portion of the apparatus is controlled by a programmable controller portion such that the surfaces of the plurality of substrates are given exposures of at least 10.sup.15 molecules/cm.sup.2 of each of the reactant gases.
    Type: Grant
    Filed: June 22, 1990
    Date of Patent: July 6, 1993
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 4947220
    Abstract: A field effect transistor device especially useful in common gate amplifier circuits for use with millimeter wave and microwave signals. By forming the device in a unitary monolith, and by making the device's source to gate and drain to gate geometry identical, the input and output portions of the device are symmetric and impedance matched, increasing the device's power handling capacity. The device's source and drain contain heavily doped regions which operate to increase the device's upper frequency range, and also act as inherent channel end stops. In several embodiments, plural such devices are yoked together integrally source to drain, eliminating common structures of adjacent stages, simplifying the device and its fabrication, and permitting traveling wave amplification.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: August 7, 1990
    Inventor: Max N. Yoder
  • Patent number: 4929986
    Abstract: An FET device especially useful in common gate amplifier circuits used as amplifiers of microwave and millimeter wave signals. The device has a diamond film layer constituting the device's channel. Device geometry is selected so that, in a common gate amplifier circuit, device input and output are impedance matched to avoid phase cancellation between input and output. In one embodiment a boron nitride layer is disposed heteroepitaxially with the diamond channel and separating the channel from the gate. In another embodiment plural such devices are yoked together integrally source to drain in such a manner that charge carriers entering the second and subsequent stages do so at maximum velocity without the need to accelerate from zero or low velocity. The resulting device has a higher power handling capacity, upper frequency range, and dynamic range.
    Type: Grant
    Filed: September 25, 1987
    Date of Patent: May 29, 1990
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 4914743
    Abstract: A Field Effect Transistor (FET) device especially useful in common gate amplifiers of signals in the microwave to millimeter range. The device's input and output are impedence matched to preclude phase cancellation and form a traveling wave amplifier capable of high voltage operation. The channel is formed of gallium arsenide separated from the gate by a layer of aluminum arsenide heteroepitaxial with gallium arsenide layer. The channel is bounded by heavily doped regions which act as inherent sources and drains, and limit electric field strength to avoid sluggish response of heavy mass carriers. The gates are formed by etching trenches in a semi-insulating gallium arsenide layer on the opposite side of the aluminum arsenide layer from the channel, using the aluminum arsenide as an etch stop, oxidizing the exposed aluminum arsenide, and epitaxially growing gallium arsenide to narrow the trench.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: April 3, 1990
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Max N. Yoder, Michael A. Morgan
  • Patent number: 4756794
    Abstract: An apparatus, and method therefor, for removing a single atomic layer from he surface of a crystalline diamond. In a preferred embodiment, the apparatus comprises: a first delivery system for flooding the surface of the diamond with a pulse of nitrogen dioxide during a first phase of operation to cause a monolayer of nitrogen oxide to be adsorbed to the surface of the diamond; and a second delivery system for impacting the surface of the diamond with a pulse of ions of mixed noble and hydrogen gasses during a second phase of operation in order to remove a single atomic layer from the surface of the diamond.
    Type: Grant
    Filed: August 31, 1987
    Date of Patent: July 12, 1988
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 4710478
    Abstract: The present invention relates to complementary logic field effect transistors having high electron and hole mobility and above to maintain transistor action at cryogenic temperatures. In one embodiment germanium material is deposited upon a gallium arsenide substrate and high hole concentration areas and high electron concentration areas are created in the germanium layer. In another embodiment a germanium substrate is provided and a gallium arsenide layer is grown upon the germanium substrate with appropriate high hole concentration areas and high electron concentration areas being created within the gallium arsenide.
    Type: Grant
    Filed: May 20, 1985
    Date of Patent: December 1, 1987
    Assignee: United States of America as represented by the Secretary of the Navy
    Inventors: Max N. Yoder, George B. Wright
  • Patent number: 4671845
    Abstract: The present invention relates to the production of a stable insulator of a germanium and a device produced thereby. A germanium substrate is provided with a layer of silicon nitride deposited on one of the outer surfaces. Ionized nitrogen is implanted by an ion beam into the silicon nitride layer. An electric field is applied across the substrate and layer. In one embodiment the substrate and layer are annealed while maintaining the electric field, the electric field is removed, and a second annealing step grows the germanium nitride insulator layer subcutaneously. In another embodiment the subcutaneous germanium nitride insulator layer is grown during a single annealing step by continued application of the electric field to the substrate and the layer.
    Type: Grant
    Filed: March 22, 1985
    Date of Patent: June 9, 1987
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 4495511
    Abstract: The performance of the conventional permeable base transistor (PBT) is imved by configuring its structure so as to eliminate excessive parasitic losses above and below its control grid structure, to eliminate excessive negative feedback in its source-grid (gate) region, and to eliminate the requirement for backfill of the trenches over the control grid structure. The improved PBT structure features, inter alia, a collector/anode/drain structure comprising a plurality of Schottky metal contacts, and the aforementioned control grid structure comprising a plurality of Schottky metal control grid elements. Each of the plurality of Schottky metal control grid elements, after fabrication, is shaped like an inverted upper case letter T emplaced in corresponding ones of a plurality of trenches of the improved PBT structure.
    Type: Grant
    Filed: August 23, 1982
    Date of Patent: January 22, 1985
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 4409608
    Abstract: A large value capacitor having interdigitated electrodes embedded within a planar substrate of semiconductor material and a method for producing the capacitor are presented. Metallic material forming a plurality of individual electrodes is deposited within a plurality of isolated parallel spaced-apart planar recesses formed into the substrate from the planar surface by ion beam machining, etching, or the like. Alternate individual electrodes are electrically interconnected to form the interdigitated opposite electrodes of the capacitor with the dielectric comprising the high resistivity substrate material. Each of the interdigitated electrodes is connectable to other electronic members including members disposed on the same substrate.
    Type: Grant
    Filed: April 28, 1981
    Date of Patent: October 11, 1983
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 4391651
    Abstract: A method of fabricating improved semiconductor devices, such as FET's, wh require or are improved by a hyperabrupt interface between the active channel and the underlying insulating region. A substrate, such as GaAs, is polished and then implanted with light ions, such as protons, to amorphize the crystal structure down to a certain depth determined by the ion-beam accelerating voltage and the ion fluence level. The crystal is damaged but not amorphized below the lowest amorphization depth. The interface between the amorphized and the non-amorphized, but damaged, regions is a relatively narrow region which will become a hyperabrupt junction. The substrate is then implanted with donor ions, such as Si, in accordance with the requirements of the device to be fabricated and under conditions which provide a retrograde donor ion concentration profile with depth. An annealing/donor activating step is now performed at a relatively low temperature (600.degree. C.
    Type: Grant
    Filed: October 15, 1981
    Date of Patent: July 5, 1983
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: H411
    Abstract: A Field Effect Transistor (FET) capable of withstanding increased positive gate biasing with respect to the source contact without incurring the penalty of drawing excessive gate current, comprising a semi-insulating substrate layer; an active channel layer of doped n-type semi-conductor material disposed on the substrate layer; a first heteroepitaxial semi-insulating layer of a semi-insulating material having a bandgap greater than the bandgap of the active channel layer material disposed on said active channel layer. The first heteroepitaxial layer has a top surface, a designated first region, a designated second region, and a designated middle section disposed therebetween wherein the first region and the second region of the first heteroepitaxial layer are implanted with activated donor impurities to form its source and drain regions. The device is also provided with conventional source, drain and gate contacts.
    Type: Grant
    Filed: August 28, 1985
    Date of Patent: January 5, 1988
    Assignee: United States of America
    Inventor: Max N. Yoder
  • Patent number: H368
    Abstract: A method of improving field-effect transistors, and the product thereof, wherein the resistivity of the upper layer of the source-gate channel region of a GaAs field-effect transistor (FET) may be selectively raised is disclosed. Impurity ions are implanted in the source-gate channel region followed by a much shallower implantation of boron in the same region. The boron ion concentration should exceed the N+ impurity ion concentration by a factor of 2 or more.
    Type: Grant
    Filed: September 16, 1980
    Date of Patent: November 3, 1987
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder