Patents by Inventor Mayank Garg
Mayank Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11309892Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.Type: GrantFiled: February 11, 2021Date of Patent: April 19, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Bharath Kumar Singareddy, Soumi Paul, Mayank Garg, Suzanne Mary Vining
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Patent number: 11283387Abstract: A system includes a motor and a motor controller coupled to the motor. The motor controller includes a current sense circuit configured to: receive a first phase current sense measurement on a first measurement path; receive the first phase current sense measurement on a second measurement path; receive a second phase current measurement on the first measurement path; receive the second phase current on the second measurement path; average the first phase current sense measurement on the first measurement path with the first phase current sense measurement on the second path; and average the second phase current sense measurement on the first measurement path with the second phase current sense measurement on the second path.Type: GrantFiled: April 15, 2020Date of Patent: March 22, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Krushal Shah, Mayank Garg, Ganapathi Hegde
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Patent number: 11256367Abstract: Grip detection can be beneficial for an electronic device to ignore unintended contacts on a touch sensitive surface. Examples of the disclosure provide various ways for identifying an input patch as a grip. In some examples, identifying an input patch as a grip comprises determining whether the input patch satisfies one or more grip identification criteria. In some examples, identified grips are saved in a grip database. In some examples, the identified grips are filtered out of touch images. In some examples, when baseline touch data for a touch-sensitive is updated, the touch processor can forgo updating the baseline for portions of the touch sensitive surface associated with the identified grips.Type: GrantFiled: May 4, 2020Date of Patent: February 22, 2022Assignee: Apple Inc.Inventors: Mayank Garg, Apexit Shah
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Publication number: 20210328536Abstract: A system includes a motor and a motor controller coupled to the motor. The motor controller includes a current sense circuit configured to: receive a first phase current sense measurement on a first measurement path; receive the first phase current sense measurement on a second measurement path; receive a second phase current measurement on the first measurement path; receive the second phase current on the second measurement path; average the first phase current sense measurement on the first measurement path with the first phase current sense measurement on the second path; and average the second phase current sense measurement on the first measurement path with the second phase current sense measurement on the second path.Type: ApplicationFiled: April 15, 2020Publication date: October 21, 2021Inventors: Krushal SHAH, Mayank GARG, Ganapathi HEGDE
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Publication number: 20210294302Abstract: Methods, systems, and apparatus to facilitate multi-channel isolation is disclosed. An example apparatus includes a multiplexer including a first input terminal, a second input terminal, and an output terminal; a modulator including an input terminal and an output terminal, the input terminal of the modulator coupled to the output terminal of the multiplexer; an isolation capacitor including a first terminal and a second terminal, the first terminal of the isolation capacitor coupled to the output terminal of the modulator; a first receiver die coupled to the second terminal of the isolation capacitor; and a second receiver die coupled to the second terminal of the isolation capacitor.Type: ApplicationFiled: June 4, 2021Publication date: September 23, 2021Inventors: Matthew David Romig, Mayank Garg
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Publication number: 20210250026Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.Type: ApplicationFiled: February 11, 2021Publication date: August 12, 2021Inventors: Win Naing Maung, Bharath Kumar Singareddy, Soumi Paul, Mayank Garg, Suzanne Mary Vining
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Patent number: 11061384Abstract: Methods, systems, and apparatus to facilitate multi-channel isolation is disclosed. An example apparatus includes a multiplexer including a first input terminal, a second input terminal, and an output terminal; a modulator including an input terminal and an output terminal, the input terminal of the modulator coupled to the output terminal of the multiplexer; an isolation capacitor including a first terminal and a second terminal, the first terminal of the isolation capacitor coupled to the output terminal of the modulator; a first receiver die coupled to the second terminal of the isolation capacitor; and a second receiver die coupled to the second terminal of the isolation capacitor.Type: GrantFiled: November 22, 2019Date of Patent: July 13, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Matthew David Romig, Mayank Garg
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Publication number: 20210157299Abstract: Methods, systems, and apparatus to facilitate multi-channel isolation is disclosed. An example apparatus includes a multiplexer including a first input terminal, a second input terminal, and an output terminal; a modulator including an input terminal and an output terminal, the input terminal of the modulator coupled to the output terminal of the multiplexer; an isolation capacitor including a first terminal and a second terminal, the first terminal of the isolation capacitor coupled to the output terminal of the modulator; a first receiver die coupled to the second terminal of the isolation capacitor; and a second receiver die coupled to the second terminal of the isolation capacitor.Type: ApplicationFiled: November 22, 2019Publication date: May 27, 2021Inventors: Matthew David Romig, Mayank Garg
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Publication number: 20210096725Abstract: Grip detection can be beneficial for an electronic device to ignore unintended contacts on a touch sensitive surface. Examples of the disclosure provide various ways for identifying an input patch as a grip. In some examples, identifying an input patch as a grip comprises determining whether the input patch satisfies one or more grip identification criteria. In some examples, identified grips are saved in a grip database. In some examples, the identified grips are filtered out of touch images. In some examples, when baseline touch data for a touch-sensitive is updated, the touch processor can forgo updating the baseline for portions of the touch sensitive surface associated with the identified grips.Type: ApplicationFiled: May 4, 2020Publication date: April 1, 2021Inventors: Mayank GARG, Apexit SHAH
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Patent number: 10944394Abstract: Methods, apparatus, systems and articles of manufacture are disclosed that provide an apparatus comprising: a first transistor including a first gate, a first current terminal, and a second current terminal; a second transistor including a second gate, a third current terminal, and a fourth current terminal; the first current terminal coupled to the third current terminal; the first gate coupled to the second gate and the second current terminal; a third transistor including a third gate, a fifth current terminal, and a sixth current terminal, the fifth current terminal coupled to the second current terminal, third gate coupled to a voltage reference node; and a fourth transistor including a fourth gate, a seventh current terminal and an eighth current terminal, the seventh current terminal coupled to the sixth current terminal, the fourth gate coupled to the seventh current terminal and the eighth current terminal coupled to the fourth current terminal.Type: GrantFiled: March 21, 2019Date of Patent: March 9, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Mayank Garg
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Publication number: 20210044294Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.Type: ApplicationFiled: October 28, 2020Publication date: February 11, 2021Inventors: Mayank Garg, Shu-Ing Ju, Arun Rao, Wei Zhang
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Patent number: 10883636Abstract: A fitting (30) for fluid communication with a fluid conduit includes a first fluid conduit connection portion (42), a second fluid conduit connection portion (42?), a header (60) disposed axially between the first fluid conduit connection portion and the second fluid conduit connection portion, and a socket (70). A fluid fitting may include a nipple (40), a radial projection (48) connected to the nipple, and an axial protrusion (120) extending from the radial projection. The axial protrusion may be configured to protrude into an axial end of a fluid conduit (80). A fluid fitting may include a fluid conduit connection portion (42) and a dynamic tip (130) connected to an end of the fluid conduit connection portion. The dynamic tip may be configured to expand in response to an increase in fluid pressure.Type: GrantFiled: June 16, 2016Date of Patent: January 5, 2021Assignee: Eaton Intelligent Power LimitedInventors: Patrick A. Schilling, Sumit Joshi, Mayank Garg, Srinivasan K. Raghavendra, Sergey S. Kotcharov, Lee Fausneaucht, Joe Natter, Ravi Soni, Devashish R. Murkya
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Patent number: 10855275Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.Type: GrantFiled: April 30, 2019Date of Patent: December 1, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mayank Garg, Shu-Ing Ju, Arun Rao, Wei Zhang
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Publication number: 20200328715Abstract: A system for driving one or more motors includes: a controller having an instruction output; one or more motor drivers, each of the motor drivers are coupled to the instruction output of the controller and each of the motor drivers having a unique address; and wherein each motor driver is only operable to receive instruction from the controller when its unique address is provided by the controller at the instruction output.Type: ApplicationFiled: April 9, 2020Publication date: October 15, 2020Inventors: Luis Eduardo Ossa, Krushal Shah, Mayank Garg, Hao Wang, Haozhi Liu
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Publication number: 20200283594Abstract: A method of forming a void, channel and/or vascular network in a polymeric matrix comprises providing a pre-vascularized structure that includes a matrix material and a sacrificial material embedded in the matrix material in a predetermined pattern, where the matrix material comprises a monomer and the sacrificial material comprises a polymer. A region of the matrix material is activated to initiate an exothermic polymerization reaction and generate a self-propagating polymerization front. As the polymerization front propagates through the matrix material and polymerizes the monomer, heat from the exothermic reaction simultaneously degrades the sacrificial material into a gas-phase and/or liquid-phase byproduct. Thus, one or more voids or channels having the predetermined pattern are rapidly formed in the matrix material.Type: ApplicationFiled: March 5, 2020Publication date: September 10, 2020Inventors: Nancy R. Sottos, Mostafa Yourdkhani, Ian D. Robertson, Mayank Garg, Jeffrey S. Moore
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Patent number: 10700586Abstract: A gate driver circuit includes a comparator and a gate driver. The comparator is configured to detect a short circuit in a first power field effect transistor (FET). The gate driver is configured to drive a gate of the first power FET by generating a first signal at a first drive current. In response to the comparator detecting a short circuit in the first power FET, the gate driver is further configured to pulse the first signal at a first pulldown current. After the pulse has ended, the gate driver is further configured to drive the gate of the first power FET at a first hold current. The first hold current is less than the first pulldown current.Type: GrantFiled: April 29, 2016Date of Patent: June 30, 2020Assignee: Texas Instruments IncorporatedInventors: Shyamsunder Balasubramanian, Toshio Yamanaka, Toru Tanaka, Mayank Garg
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Publication number: 20200106396Abstract: An offset drift compensation circuit for correcting offset drift that changes with temperature. In one example, offset drift compensation circuit includes a low temperature offset compensation circuit and a high temperature offset circuit. The low temperature offset compensation circuit is configured to compensate for drift in offset at a first rate below a selected temperature. The high temperature offset compensation circuit is configured to compensate for drift in offset at a second rate above the selected temperature. The first rate is different from the second rate.Type: ApplicationFiled: December 3, 2019Publication date: April 2, 2020Inventors: Shyamsunder BALASUBRAMANIAN, Wenxiao TAN, Mayank GARG, Toru TANAKA
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Publication number: 20200076419Abstract: Methods, apparatus, systems and articles of manufacture are disclosed that provide an apparatus comprising: a first transistor including a first gate, a first current terminal, and a second current terminal; a second transistor including a second gate, a third current terminal, and a fourth current terminal; the first current terminal coupled to the third current terminal; the first gate coupled to the second gate and the second current terminal; a third transistor including a third gate, a fifth current terminal, and a sixth current terminal, the fifth current terminal coupled to the second current terminal, third gate coupled to a voltage reference node; and a fourth transistor including a fourth gate, a seventh current terminal and an eighth current terminal, the seventh current terminal coupled to the sixth current terminal, the fourth gate coupled to the seventh current terminal and the eighth current terminal coupled to the fourth current terminal.Type: ApplicationFiled: March 21, 2019Publication date: March 5, 2020Inventor: Mayank Garg
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Publication number: 20200076425Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.Type: ApplicationFiled: April 30, 2019Publication date: March 5, 2020Inventors: Mayank Garg, Shu-Ing Ju, Arun Rao
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Patent number: 10530308Abstract: An offset drift compensation circuit for correcting offset drift that changes with temperature. In one example, offset drift compensation circuit includes a low temperature offset compensation circuit and a high temperature offset circuit. The low temperature offset compensation circuit is configured to compensate for drift in offset at a first rate below a selected temperature. The high temperature offset compensation circuit is configured to compensate for drift in offset at a second rate above the selected temperature. The first rate is different from the second rate.Type: GrantFiled: March 23, 2018Date of Patent: January 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shyamsunder Balasubramanian, Wenxiao Tan, Mayank Garg, Toru Tanaka