Abstract: Structures and methods for a solar cell having an integrated bypass switch are provided. According to one embodiment, an integrated solar cell and bypass switch comprising a semiconductor layer has a background doping, a frontside, and a backside. A patterned first level metal is positioned over the layer backside and an electrically insulating backplane is positioned over the first level metal. A trench isolation pattern partitions the semiconductor layer into a solar cell region and at least one monolithically integrated bypass switch region. A patterned second level metal is positioned over the electrically insulating backplane and which connects to the first level metal through the backplane and electrically connects the monolithically integrated solar cell and bypass switch structure.

Abstract: In one embodiment, there is provided a carrier comprising a top semiconductor layer having isolated positive electrode regions and isolated negative electrode regions separated by a frontside trench through the top semiconductor layer extending at least to an underlying insulating layer positioned between the top semiconductor layer and a bottom semiconductor layer. A dielectric layer covers the top exposed surfaces of the carrier. Backside trenches through the bottom semiconductor layer extending at least to the insulating layer form isolated backside regions corresponding to the frontside positive and negative electrode regions. Backside contacts positioned on the bottom semiconductor layer and coupled to the positive and negative electrode regions allow for the electric charging of the frontside electrode regions.

Abstract: According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.

Abstract: A method for making a crystalline silicon solar cell substrate is provided. A doped dielectric layer is deposited over the backside surface of a crystalline silicon substrate, the doped dielectric layer having a polarity opposite the polarity of the crystalline silicon substrate. Portions of the backside surface of the crystalline substrate are exposed through the doped dielectric layer. An overlayer is deposited over the doped dielectric layer and the exposed portions of the backside surface of the crystalline silicon substrate. Pulsed laser ablation of the overlayer is performed with a flat top laser beam on the silicon substrate to form continuous base openings nested within the exposed portions of the backside surface of the crystalline silicon substrate, the flat top laser beam having a beam intensity profile flatter as compared to a Gaussian beam intensity profile and having a rectangular beam cross section.

Abstract: Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

Abstract: Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers.

Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.

Abstract: Methods and structures for extracting at least one electric parametric value from a back contact solar cell. According to one embodiment, a first layer of electrically conductive metal having an interdigitated pattern of base electrodes and emitter electrodes is formed on the backside surface of a semiconductor solar cell substrate. An electrically insulating layer is formed on the first layer of electrically conductive metal providing electrical isolation between the first layer of electrically conductive metal and a second layer of electrically conductive metal. Vias are formed in the electrically insulating layer providing access to the first layer of electrically conductive metal. A second electrically conductive metallization layer is formed on the electrically insulating layer and contacts the first electrically conductive metal layer through the vias.

Abstract: Methods for laser irradiation aluminum doping for monocrystalline silicon substrates are provided. According to one aspect of the disclosed subject matter, aluminum metal contacts are formed directly on a surface of a monocrystalline silicon substrate. The aluminum metal contact is selectively heated via laser irradiation, thereby causing the aluminum and a portion of the monocrystalline silicon substrate in proximity to the aluminum to reach a temperature sufficient to allow at least a portion of the silicon to dissolve in the aluminum. The aluminum and the portion of the monocrystalline silicon substrate in proximity to the aluminum is allowed to cool, thereby forming an aluminum-rich doped silicon layer on the monocrystalline silicon substrate.

Abstract: A method for making a back contact solar cell. Base isolation regions are formed in a crystalline silicon back contact solar cell substrate having a substrate thickness in the range of approximately 1 micron to 100 microns. Pulsed laser ablation of a substance on the crystalline silicon back contact solar cell substrate is performed to form base openings, wherein the substance is at least one of silicon oxide, silicon nitride, aluminum oxide, silicon oxynitride, or silicon carbide. Emitter regions are selectively doped and base regions are selectively doped. Contact openings are formed for the selectively doped base regions and the selectively doped emitter regions. Metallization is formed on the selectively doped base regions and the selectively doped emitter regions.

Abstract: An apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates in a batch electrochemical anodic etch process is provided. The apparatus comprises a plurality of edge-sealing template mounts operable to prevent formation of porous silicon at the edges of a plurality of templates. An electrolyte is disposed among the plurality of templates. The apparatus further comprises a power supply operable to switch polarity, change current intensity, and control etching time to produce the porous silicon layers.

Abstract: According to one embodiment, a releasing apparatus for separating a semiconductor substrate from a semiconductor template, the releasing apparatus having an enclosed pressure chamber having at least one gas inlet and at least one gas outlet. A top vacuum chuck for securing a released semiconductor substrate or semiconductor template in the enclosed pressure chamber. A bottom vacuum chuck for securing an attached semiconductor substrate and semiconductor template in the enclosed pressure chamber. A gap between the attached semiconductor substrate and semiconductor template and the top vacuum chuck allowing gas flowing through the gap to generate lifting forces on the attached semiconductor substrate and semiconductor template.

Abstract: Solar cell structures having improved efficiency, distributed shade management, and reduced fabrication complexity.

Abstract: Fabrication methods and structures are provided for the formation of monolithically isled back contact back junction solar cells. In one embodiment, base and emitter contact metallization is formed on the backside of a back contact back junction solar cell substrate. A trench stop layer is formed on the backside of a back contact back junction solar cell substrate and is electrically isolated from the base and emitter contact metallization. The trench stop layer has a pattern for forming a plurality semiconductor regions. An electrically insulating layer is formed on the base and emitter contact metallization and the trench stop layer. A trench isolation pattern is formed through the back contact back junction solar cell substrate to the trench stop layer which partitions the semiconductor layer into a plurality of solar cell semiconductor regions on the electrically insulating layer.

Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Abstract: Fabrication methods for making back contact back junction solar cells. A base dopant source, a field emitter dopant source, and an emitter dopant source are deposited on the back surface of a solar cell substrate. The solar cell substrate is annealed forming emitter contact regions corresponding to the emitter dopant source, field emitter regions corresponding to the field emitter dopant, and base contact regions corresponding to the base dopant source. The base dopant source, field emitter dopant source, and the emitter dopant source are etched. A backside passivation layer is deposited on the back surface of the solar cell. Contacts are opened to the emitter contact regions and the base contact regions through the backside passivation layer. Patterned base metallization and patterned emitter metallization is formed on the back surface of the solar cell with electrical interconnections to the base contact regions and the emitter contact regions.

Abstract: A back contact solar cell structure having a light receiving frontside and a metallized backside of on-cell patterned base and emitter metallization electrically connected to base and emitter regions on a back contact solar cell semiconductor substrate. A backplane laminate layer made of resin and fibers and having a coefficient of thermal expansion relatively matched to the back contact solar cell semiconductor substrate is attached to the on-cell base and emitter metallization and to portions of the back contact solar cell semiconductor substrate not covered by the on-cell base and emitter metallization.

Abstract: A three-dimensional thin-film solar cell comprising a three-dimensional thin-film solar cell substrate having a prism array design comprising a plurality dual-aperture unit cells with emitter junction regions and doped base regions. The three-dimensional thin-film solar cell comprises emitter metallization regions and base metallization regions.

Abstract: A method is provided for fabricating a semiconductor substrate by forming a porous semiconductor layer conformally on a semiconductor template and then forming a semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the semiconductor substrate is formed on the semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the semiconductor substrate and is positioned between the inner trench and the edge of the semiconductor substrate. The semiconductor substrate is then released from the semiconductor template.

Abstract: Processing equipment for the metallization of a plurality of semiconductor workpieces. A controlled atmospheric non-oxidizing gas region comprises at least two enclosed deposition zones, the controlled atmospheric non-oxidizing gas region is isolated from external oxidizing ambient. A temperature controller adjusts the temperature of the semiconductor workpiece in each of the at least two enclosed deposition zones. Each of the enclosed deposition zones comprising at least one spray gun for the metallization of the semiconductor workpiece. A transport system moves the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. A batch carrier plate carries the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. The controlled atmospheric non-oxidizing gas region further comprises a gas-based pre-cleaning zone.