Abstract: A waveguide includes a first layer and a second layer. The first layer comprises a material of a first refractive index. The second layer is surrounded by the first layer and comprises a material of a second refractive index greater than the first refractive index. The second layer comprises a main body, a first fork and a second fork. The main body has a first substantially constant thickness. The first fork is extended from the main body and has a first tapering end exposed by the first layer. The first fork has the first substantially constant thickness. The second fork is extended from the main body and has a second tapering end exposed by the first layer. The second fork has the first substantially constant thickness.

Abstract: A semiconductor device package includes a substrate and an optical device. The optical device includes a first portion extending into the substrate and not extending beyond a first surface of the substrate. The optical device further includes a second portion extending along the first surface of the substrate.

Abstract: A waveguide includes a first layer and a second layer. The first layer comprises a material of a first refractive index. The second layer is surrounded by the first layer and comprises a material of a second refractive index greater than the first refractive index. The second layer comprises a main body, a first fork and a second fork. The main body has a first substantially constant thickness. The first fork is extended from the main body and has a first tapering end exposed by the first layer. The first fork has the first substantially constant thickness. The second fork is extended from the main body and has a second tapering end exposed by the first layer. The second fork has the first substantially constant thickness.

Abstract: The present disclosure relates to an optical fiber structure, an optical communication apparatus and a manufacturing process for manufacturing the same. The optical fiber structure includes a core portion and a cladding portion. The cladding portion encloses the core portion, and includes a light reflection surface and a light incident surface. The light reflection surface is inclined at an angle of about 30 degrees to about 60 degrees with respect to the core portion, and the light incident surface is substantially flat and is substantially parallel with the core portion.

Abstract: A semiconductor device package includes a substrate and an optical device. The optical device includes a first portion extending into the substrate and not extending beyond a first surface of the substrate. The optical device further includes a second portion extending along the first surface of the substrate.

Abstract: A semiconductor device includes a substrate, a passivation layer and an optical element. The substrate includes a surface and a sidewall. The passivation layer is disposed on the surface of the substrate. The optical element is disposed in the substrate and exposed from the sidewall of the substrate. The sidewall of the substrate is inclined towards the surface of the substrate at an angle of approximately 87 degrees to approximately 89 degrees.

Abstract: A semiconductor device includes a substrate, a passivation layer and an optical element. The substrate includes a surface and a sidewall. The passivation layer is disposed on the surface of the substrate. The optical element is disposed in the substrate and exposed from the sidewall of the substrate. The sidewall of the substrate is inclined towards the surface of the substrate at an angle of approximately 87 degrees to approximately 89 degrees.

Abstract: The present disclosure relates to an optical fiber structure, an optical communication apparatus and a manufacturing process for manufacturing the same. The optical fiber structure includes a core portion and a cladding portion. The cladding portion encloses the core portion, and includes a light reflection surface and a light incident surface. The light reflection surface is inclined at an angle of about 30 degrees to about 60 degrees with respect to the core portion, and the light incident surface is substantially flat and is substantially parallel with the core portion.

Abstract: A pixel structure includes a scan line, a data line, an active device, a first electrode layer, a second electrode layer, and an insulation layer. The active device is electrically connected to the scan line and the data line. The first electrode layer is electrically connected to the active device. The second electrode layer is electrically insulated from the first electrode layer. The insulation layer is located between the first electrode layer and the second electrode layer, and the first electrode layer or the second electrode layer includes an enclosed-frame-shaped portion, first V-shaped branch portions, and second V-shaped branch portions. The first V-shaped branch portions and the second V-shaped branch portions are arranged within the enclosed-frame-shaped portion in opposite directions, and end terminals of the first V-shaped branch portions and end terminals of the second V-shaped branch portions are connected to the enclosed-frame-shaped portion.

Abstract: A display panel includes a first substrate, plural pixel structures on the first substrate, a second substrate and a display medium between the two substrates. Each of the pixel structures includes a scan line, a data line, an active device, a pixel electrode, a common electrode, an insulating layer and a counter electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The common electrode is electrically insulated from the pixel electrode. The insulating layer is between the pixel electrode and the common electrode. The counter electrode is electrically insulated from the pixel electrode and the common electrode, wherein the counter electrode is disposed symmetrically around the pixel electrode, and the voltage absolute value of the counter electrode is greater than the voltage absolute value of the pixel electrode.

Abstract: A driving circuit electrically coupled between a first data line and a second data line and between a first scan line and a second scan line. The driving circuit includes a first switch, a second switch, a third switch, a fourth switch, a first sub-capacitor, a second sub-capacitor, a fifth switch, a sixth switch, a first voltage dividing unit and a second voltage dividing unit. The first voltage dividing unit is coupled between a second end of the fifth switch and a reference voltage end. The second voltage dividing unit is coupled between a second end of the sixth switch and the reference voltage end, for redistributing stored electric charges.

Abstract: A pixel structure having a first region and a second region adjacent to each other is provided. The pixel structure includes a first pixel electrode and a second pixel electrode. The first pixel electrode forms a plurality of first V-shaped electrode patterns. A tip of the first V-shaped electrode patterns is located at a boundary of the first region and the second region. The second pixel electrode includes a plurality of second V-shaped electrode patterns and a first protrusion electrode pattern. The first protrusion electrode pattern is connected to one of the second V-shaped electrode patterns and protrudes towards an adjacent first V-shaped electrode pattern from the tip of the second V-shaped electrode pattern.

Abstract: A pixel structure includes a scan line, a data line, an active device, a first electrode layer, a second electrode layer, and an insulation layer. The active device is electrically connected to the scan line and the data line. The first electrode layer is electrically connected to the active device. The second electrode layer is electrically insulated from the first electrode layer. The insulation layer is located between the first electrode layer and the second electrode layer, and the first electrode layer or the second electrode layer includes an enclosed-frame-shaped portion, first V-shaped branch portions, and second V-shaped branch portions. The first V-shaped branch portions and the second V-shaped branch portions are arranged within the enclosed-frame-shaped portion in opposite directions, and end terminals of the first V-shaped branch portions and end terminals of the second V-shaped branch portions are connected to the enclosed-frame-shaped portion.

Abstract: A display panel includes a first substrate, plural pixel structures on the first substrate, a second substrate and a display medium between the two substrates. Each of the pixel structures includes a scan line, a data line, an active device, a pixel electrode, a common electrode, an insulating layer and a counter electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The common electrode is electrically insulated from the pixel electrode. The insulating layer is between the pixel electrode and the common electrode. The counter electrode is electrically insulated from the pixel electrode and the common electrode, wherein the counter electrode is disposed symmetrically around the pixel electrode, and the voltage absolute value of the counter electrode is greater than the voltage absolute value of the pixel electrode.

Abstract: A pixel structure having a first region and a second region adjacent to each other is provided. The pixel structure includes a first pixel electrode and a second pixel electrode. The first pixel electrode forms a plurality of first V-shaped electrode patterns. A tip of the first V-shaped electrode patterns is located at a boundary of the first region and the second region. The second pixel electrode includes a plurality of second V-shaped electrode patterns and a first protrusion electrode pattern. The first protrusion electrode pattern is connected to one of the second V-shaped electrode patterns and protrudes towards an adjacent first V-shaped electrode pattern from the tip of the second V-shaped electrode pattern.

Abstract: A pixel driving circuit is electrically coupled between a first data line and a second data line and between a first scan line and a second scan line, and includes a first switch, a second switch, a third switch, a fourth switch, a liquid crystal capacitor electrically connected between the first switch and the second switch, a first capacitor electrically connected to the first switch, a second capacitor electrically connected to the second switch, a first storage capacitor, a second storage capacitor and at least one switching unit. The first storage capacitor is electrically connected to the third switch and supplied by a reference voltage. The second storage capacitor is electrically connected to the fourth switch and supplied by the reference voltage. The at least one switching unit is used for redistributing charges in the pixel driving circuit.

Abstract: A pixel driving circuit is electrically coupled between a first data line and a second data line and between a first scan line and a second scan line, and includes a first switch, a second switch, a third switch, a fourth switch, a liquid crystal capacitor electrically connected between the first switch and the second switch, a first capacitor electrically connected to the first switch, a second capacitor electrically connected to the second switch, a first storage capacitor, a second storage capacitor and at least one switching unit. The first storage capacitor is electrically connected to the third switch and supplied by a reference voltage. The second storage capacitor is electrically connected to the fourth switch and supplied by the reference voltage. The at least one switching unit is used for redistributing charges in the pixel driving circuit.

Abstract: A driving circuit electrically coupled between a first data line and a second data line and between a first scan line and a second scan line. The driving circuit includes a first switch, a second switch, a third switch, a fourth switch, a first sub-capacitor, a second sub-capacitor, a fifth switch, a sixth switch, a first voltage dividing unit and a second voltage dividing unit. The first voltage dividing unit is coupled between a second end of the fifth switch and a reference voltage end. The second voltage dividing unit is coupled between a second end of the sixth switch and the reference voltage end, for redistributing stored electric charges.

Abstract: A liquid crystal display panel having pixel regions includes a light shielding layer having opening regions corresponding to the pixel regions, first pixel electrodes and second pixel electrodes. Each first pixel electrode includes strip first pixel electrode patterns. Each second pixel electrode includes strip second pixel electrode patterns. Each opening region includes sub regions. Each of the strip first pixel electrode patterns and its neighboring strip second pixel electrode pattern in each of the sub regions are separated by an electrode spacing. Electrode spacings in different sub regions are different. An area of all the sub regions with the electrode spacings less than or equal to 12 micrometers accounts for less than or equal to 35% area of each opening region. An area of the other sub regions with the electrode spacings greater than 12 micrometers accounts for more than or equal to 65% area of each opening region.

Abstract: A display panel includes a pixel structure that has first, second, and third sub-pixels. In the first sub-pixel, a first pixel electrode having first branches and a second pixel electrode having second branches are alternately arranged. Gap dB is defined between adjacent first and second branches. In the second sub-pixel, a third pixel electrode having third branches and a fourth pixel electrode having fourth branches are alternately arranged. Gap dG is defined between adjacent third and fourth branches. In the third sub-pixel, a fifth pixel electrode having fifth branches and a sixth pixel electrode having sixth branches are alternately arranged. Gap dR is defined between adjacent fifth and sixth branches. The gaps dB, dG, and dR at least include minimum gaps dBmin, dGmin, and dRmin and gaps dBn, dGn, and dRn, respectively. Here, dGn is equal to dRn, and (1/dBn)?[(1/dRn)*1.1].