Abstract: An inspecting circuit layout according to the present invention is provided. The inspecting circuit layout is adapted for inspecting panel units group by group, each of the panel units having a plurality of first and second signal lines. The inspecting circuit layout includes a multiplexer (MUX) and an inspecting pad. The MUX is electrically connected with at least one of the first or second signal lines of the panel units, and the inspecting pad is electrically connected to the MUX. The MUX is adapted for selectively connecting the inspecting pad with the first or second signal lines of a group of panel units.

Abstract: A pixel structure including a scan line, a data line, a first thin film transistor, a second thin film transistor, a first pixel electrode and a second pixel electrode, is described. The first thin film transistor is electrically connected to the scan line and the data line and has a first device width/length ratio. The second thin film transistor is also electrically connected to the scan line and the data line and has a second device width/length ratio. The first pixel electrode is electrically connected to the first thin film transistor while the second pixel electrode is electrically connected to the second thin film transistor.

Abstract: A thin film transistor array substrate and a manufacturing method thereof are provided. Wherein, scan lines and data lines are disposed on a substrate to define a plurality of pixel regions. Thin film transistors are disposed in the pixel regions correspondingly and driven by the scan lines and the data lines. Pixel electrodes are disposed in the pixel regions respectively and electrically connected to the corresponding thin film transistors. In addition, a gate insulating layer is disposed on the substrate to cover the scan lines and gates of the thin film transistors. A patterned leaning layer is disposed on the gate insulating layer and forms a plurality of non-continuous patterns under the data lines. The non-continuous patterns expose portions of the gate insulating layer under the data lines to which a portion of each data line can be directly attached.

Abstract: A thin film transistor array substrate having a display area and a non-display area is provided. Pixel units, scan lines and data lines are disposed within the display area, and the scan line and data line are electrically connected to the corresponding pixel units. The non-display region has first chip bonding area and at least one first connecting line disposed within the non-display region. Scan line terminals and first bonding pads are disposed within the first chip bonding area. The scan line terminal is electrically connected to the corresponding scan line. The first connecting line is arranged between two of the adjacent chip bonding areas for making the first bonding pads within the adjacent chip bonding areas electrically connect to each other. The first connecting line comprises conductive layers which are electrically connected to one another.

Abstract: A liquid crystal display with electrostatic discharge protection includes an inner short-ring which surrounds the display region and an outer short-ring which surrounds the inner short-ring, wherein the inner short-ring and the outer short-ring are both located near the panel edge. The inner short-ring is connected with the display region indirectly, and the outer short-ring is electrically connected with the display region and the inner short-ring at the same time. The inner short-ring is electrically connected with the display region through the outer short-ring, and the inner short-ring can serve as a repair line after edge grinding the panel.

Abstract: A thin film transistor array substrate including a substrate, scan lines, data lines, common lines, thin film transistors, pixel electrode and repairing lines is provided. The scan lines and the data lines are disposed on the substrate for defining pixel regions. The common lines disposed on the substrate are substantially paralleled to one another, and the scan line is arranged between every neighboring two of the common lines. Each thin film transistor is arranged on one of the pixel regions and is electrically connected to the corresponding scan line and data line. Each pixel electrode is arranged on one of the pixel region and is electrically connected to the corresponding thin film transistor. Each repairing line is disposed below the corresponding data line, and one end of each repairing line overlaps with the thin film transistor disposed at one side of the corresponding data line.

Abstract: An exposure process is provided. First, a plurality of optical modules is provided. The optical modules are arranged in order and a partially overlap areas is formed at the overlapping region between each two adjacent optical modules. A photo mask with pluralities of first device patterns and pluralities of second device patterns thereon is provided and disposed under the optical modules. The locations of the first device patterns are corresponding to the partially overlap areas, and the locations of the second device patterns are corresponding to the other area. In particular, the first device patterns have a dimension different from that of the second device patterns. A photo resist layer is provided under the photo mask. The optical modules and the photo mask are used to perform an exposure step to transfer the first device patterns and the second device patterns to the photo resist layer.

Abstract: The present invention provides a conducting wire structure for a liquid crystal display. This structure uses bent conducting wires to connect the peripheral terminals with the pixel region. These bent conducting wires are designed to form different lengths or widths to achieve equal resistance and to fit in the cramped space between the pixel region and the peripheral terminals.

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.

Abstract: A thin-film transistor (hereinafter referred to as “TFT”) LCD (liquid crystal display) apparatus and its manufacturing method can improve the shortages of improper metal coating protection and incomplete light shielding. Besides, the semi-conductor layer usually uses A-Si layer as a light shielding and a coating materials. Furthermore, the TFT-LCD apparatus and its manufacturing method of the present invention can effectively overcome incomplete light shielding problem of the prior art without using extra numbers of masks for achieving the anti-electrostatic purpose.

Abstract: The present invention provides a conducting wire structure for a liquid crystal display. This structure uses bent conducting wires to connect the peripheral terminals with the pixel region. These bent conducting wires are designed to form different lengths or widths to achieve equal resistance and to fit in the cramped space between the pixel region and the peripheral terminals.

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.