Patents by Inventor Meng-Chun Chen

Meng-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11147157
    Abstract: A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 12, 2021
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Publication number: 20210311105
    Abstract: A test apparatus includes a tray including at least a first region and a second region, and a cap disposed over the tray. The cap includes a cap body, and at least a first magnet and a second magnet disposed over the cap body. The first magnet is configured to provide a first magnetic field to the first region of the tray, and the second magnet is configured to provide a second magnetic field to the second region of the tray. A strength of the first magnetic field is different from a strength of the second magnetic field.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: HARRY-HAK-LAY CHUANG, TIEN-WEI CHIANG, CHIA YU WANG, MENG-CHUN SHIH, CHING-HUANG WANG, CHIH-YANG CHANG, CHIA-HSIANG CHEN, CHIH-HUI WENG
  • Patent number: 11140773
    Abstract: A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 5, 2021
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Publication number: 20210272849
    Abstract: A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Sung-Li Wang, Neng-Kuo Chen, Ding-Kang Shih, Meng-Chun Chang, Yi-An Lin, Gin-Chen Huang, Chen-Feng Hsu, Hau-Yu Lin, Chih-Hsin Ko, Sey-Ping Sun, Clement Hsingjen Wann
  • Patent number: 10720440
    Abstract: A method for fabricating a semiconductor structure is shown. A first gate of a first device and a second gate of a second device are formed over a semiconductor substrate. First LDD regions are formed in the substrate beside the first gate using the first gate as a mask. A conformal layer is formed covering the first gate, the second gate and the substrate, wherein the conformal layer has sidewall portions on sidewalls of the second gate. Second LDD regions are formed in the substrate beside the second gate using the second gate and the sidewall portions of the conformal layer as a mask.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: July 21, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Wen Wang, Hsiang-Chen Lee, Wen-Peng Hsu, Kuo-Lung Li, Meng-Chun Chen, Zi-Jun Liu, Ping-Chia Shih
  • Publication number: 20190043877
    Abstract: A non-volatile memory device includes a semiconductor substrate, a control gate electrode, a first oxide-nitride-oxide (ONO) structure, a selecting gate electrode, a second ONO structure, and a spacer structure. The control gate electrode and the selecting gate electrode are disposed on the semiconductor substrate. The first ONO structure is disposed between the control gate electrode and the semiconductor substrate. The second ONO structure is disposed between the control gate electrode and the selecting gate electrode in a first direction. The spacer structure is disposed between the control gate electrode and the second ONO structure in the first direction. A distance between the control gate electrode and the selecting gate electrode in the first direction is smaller than or equal to a sum of a width of the second ONO structure and a width of the spacer structure in the first direction.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 7, 2019
    Inventors: Kuo-Lung Li, Ping-Chia Shih, Wen-Peng Hsu, Chia-Wen Wang, Meng-Chun Chen, Chih-Hao Pan
  • Patent number: 10199385
    Abstract: A non-volatile memory device includes a semiconductor substrate, a control gate electrode, a first oxide-nitride-oxide (ONO) structure, a selecting gate electrode, a second ONO structure, and a spacer structure. The control gate electrode and the selecting gate electrode are disposed on the semiconductor substrate. The first ONO structure is disposed between the control gate electrode and the semiconductor substrate. The second ONO structure is disposed between the control gate electrode and the selecting gate electrode in a first direction. The spacer structure is disposed between the control gate electrode and the second ONO structure in the first direction. A distance between the control gate electrode and the selecting gate electrode in the first direction is smaller than or equal to a sum of a width of the second ONO structure and a width of the spacer structure in the first direction.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: February 5, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Lung Li, Ping-Chia Shih, Wen-Peng Hsu, Chia-Wen Wang, Meng-Chun Chen, Chih-Hao Pan
  • Publication number: 20180211966
    Abstract: A method for fabricating a semiconductor structure is shown. A first gate of a first device and a second gate of a second device are formed over a semiconductor substrate. First LDD regions are formed in the substrate beside the first gate using the first gate as a mask. A conformal layer is formed covering the first gate, the second gate and the substrate, wherein the conformal layer has sidewall portions on sidewalls of the second gate. Second LDD regions are formed in the substrate beside the second gate using the second gate and the sidewall portions of the conformal layer as a mask.
    Type: Application
    Filed: March 21, 2018
    Publication date: July 26, 2018
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Wen Wang, Hsiang-Chen Lee, Wen-Peng Hsu, Kuo-Lung Li, Meng-Chun Chen, Zi-Jun Liu, Ping-Chia Shih
  • Patent number: 9966382
    Abstract: A method for fabricating a semiconductor structure is shown. A first gate of a first device and a second gate of a second device are formed over a semiconductor substrate. First LDD regions are formed in the substrate beside the first gate using the first gate as a mask. A conformal layer is formed covering the first gate, the second gate and the substrate, wherein the conformal layer has sidewall portions on sidewalls of the second gate. Second LDD regions are formed in the substrate beside the second gate using the second gate and the sidewall portions of the conformal layer as a mask.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: May 8, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Wen Wang, Hsiang-Chen Lee, Wen-Peng Hsu, Kuo-Lung Li, Meng-Chun Chen, Zi-Jun Liu, Ping-Chia Shih
  • Publication number: 20180053771
    Abstract: A method for fabricating a semiconductor structure is shown. A first gate of a first device and a second gate of a second device are formed over a semiconductor substrate. First LDD regions are formed in the substrate beside the first gate using the first gate as a mask. A conformal layer is formed covering the first gate, the second gate and the substrate, wherein the conformal layer has sidewall portions on sidewalls of the second gate. Second LDD regions are formed in the substrate beside the second gate using the second gate and the sidewall portions of the conformal layer as a mask.
    Type: Application
    Filed: August 16, 2016
    Publication date: February 22, 2018
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Wen Wang, Hsiang-Chen Lee, Wen-Peng Hsu, Kuo-Lung Li, Meng-Chun Chen, Zi-Jun Liu, Ping-Chia Shih
  • Patent number: 9466497
    Abstract: The invention provides a method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory cell, comprising: (S1) forming a pad oxide pattern on a silicon substrate having a recess exposing a tunnel region of the silicon substrate; (S2) forming a bottom oxide layer, a nitride layer, a top oxide layer covering the recess and the pad oxide pattern to form a first ONO structure; (S3) forming a photoresist on the first ONO structure covering the recess and a peripheral region of the pad oxide pattern; (S4) removing a part of the first ONO structure exposed by the photoresist to form an U-shaped ONO structure; (S5) trimming the photoresist to exposed a part of the U-shaped ONO structure above the recess; (S6) removing the part of the U-shaped ONO structure; (S7) removing the photoresist; (S8) removing the pad oxide pattern and the top oxide layer; and (S9) forming a gate structure.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: October 11, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kuo-Lung Li, Ping-Chia Shih, Hsiang-Chen Lee, Yu-Chun Chang, Chia-Wen Wang, Meng-Chun Chen, Chih-Yang Hsu
  • Patent number: 8254612
    Abstract: A sound system (30) for a portable electronic device (20) is provided. The sound system includes a sound generator (28), a sound processor (25), and a speaker subsystem (24). The sound generator is configured for generating sound recordings with single sound format. The sound processor electronically connects with the sound generator and is configured for receiving the sound recordings with single sound format transmitted from the sound processor. The sound processor is configured for processing the sound recordings with single sound format into sound recordings with 5.1 surround format. The speaker subsystem electronically connects with the sound processor and is configured for receiving the sound recordings with 5.1 surround format transmitted from the sound processor and playing the sound recordings with 5.1 surround format.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: August 28, 2012
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Meng-Chun Chen
  • Patent number: 8204257
    Abstract: A method for increasing ring tone volume is provided. The method includes steps of: reading an audio file which is set as a current ring tone; determining whether the ring tone is a MP3 audio file or a musical instrument digital interface (MIDI) audio file; adjusting frequencies by using an equalizer technique to increase volume of the ring tone if the ring tone is the MP3 audio file; adjusting a volume level of the ring tone to be the highest volume level, and adjusting timbre of the ring tone to increase the ring tone volume by simulating a musical score of the ring tone by using different instruments if the ring tone is the MIDI audio file. A related system is also provided.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: June 19, 2012
    Assignee: Chi Mei Communications Systems, Inc.
    Inventor: Meng-Chun Chen
  • Patent number: 8081767
    Abstract: A method for adjusting frequency response curve of a speaker comprises these steps: testing sensitivity of the speaker in at least two types of hardware conditions and recording corresponding frequency response curves; selecting a frequency response curve that comes closest to falling within a predetermined range for selected frequency ranges; and adjusting the selected frequency response curve with a filter.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: December 20, 2011
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Meng-Chun Chen
  • Patent number: 8059840
    Abstract: An exemplary method for locating sound sources is disclosed. The method includes the steps of: loading a sound source location program into a handheld device; activating the sound source location program; calculating a total voltage representing sound waves received by a microphone array via a waveform computation algorithm; calculating energy intensities of the total voltage according to the total voltage; and selecting a maximum energy intensity from the calculated energy intensities, and determining the location of the maximum energy intensity, the location of the maximum energy intensity is the location of the sound source. A related system is also disclosed.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: November 15, 2011
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Meng-Chun Chen
  • Publication number: 20110115638
    Abstract: A method for controlling a cleaning device is presented, which includes the following steps. A cleaning device includes a control unit, a fan module, an optical emitter, and an optical sensor. The optical emitter and the optical sensor are located in an air inlet of the fan module. The control unit is preset with a first impedance value (Z1), a second impedance value (Z2), and a threshold, where 0<Z1<Z2. Then, the control unit reads an impedance value (Z) of the fan module. If Z1<Z<Z2, the control unit drives the fan module. If Z2<Z, the control unit reads a detected value of the optical sensor. If the detected value exceeds the threshold, the control unit drives the fan module, so as to increase a suction force of the fan module. If the detected value is smaller than the threshold, the control unit turns off the fan module.
    Type: Application
    Filed: December 29, 2009
    Publication date: May 19, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu Liang Chung, Chun Hsien Liu, Chun Chieh Wang, Long Der Chen, Meng Chun Chen, Chun Sheng Wang
  • Patent number: 7930005
    Abstract: A portable electronic device (100) includes a body (10) and a housing (30). The body has a speaker (20) and a groove (13). The speaker is received in the groove. The housing defines at least one main hole (34) and two subsidiary holes (35). The subsidiary holes is disposed adjacent to the at least one main hole.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: April 19, 2011
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Meng-Chun Chen
  • Patent number: 7894850
    Abstract: A portable electronic device (100) includes a main body (10) having at least one cavity (131) defined therein, at least one speaker device (20) being movable received in the cavity of the main body, and at least one latching mechanism (30) movably attached to the main body. The speaker device has a resonant chamber (28) defined therein, and a positioning stop member (262) extending therefrom. Each resonant chamber communicates with a corresponding cavity. The at least one latching mechanism includes a latching body (31), and the latching body is configured for selectably engaging with the positioning stop member to enable control of movement of a corresponding speaker device relative to the main body.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: February 22, 2011
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Meng-Chun Chen
  • Patent number: 7861365
    Abstract: A robotic vacuum cleaner is disclosed in the present invention, which comprises a controller, at least a driving wheel module, and a dust-collecting module. The controller is disposed on a housing plate. The driving wheel module, electrically connecting to the controller, further includes: a driver; a wheel connecting to the output shaft of the driver; a linkage rod, having two ends pivotally fixed on the housing plate and the driver respectively; and a resilience element, having two ends pivotally connected to the housing plate and the driver respectively. The dust-collecting module, disposed on the housing plate, is capable of vacuuming for filtering and collecting dust.
    Type: Grant
    Filed: October 1, 2006
    Date of Patent: January 4, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Yann-Shuoh Sun, Jiing-Fu Chen, Yu-Liang Chung, Weng-Jung Lu, Meng-Chun Chen, Chun-Hsien Liu
  • Publication number: 20100332222
    Abstract: An intelligent classification method is proposed. The method extracts vocal features from the temporal domain, spectral domain and statistical features for measuring the vocal signal. The measured result is grouped by comparing with the trained data with single voiced source, and then different voices can be separated from the vocal signal to be classified. The vocal features are evaluated from temporal domain and spectral domain and the statistical features, and the method can improve the accuracy of the voice classification.
    Type: Application
    Filed: September 9, 2010
    Publication date: December 30, 2010
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: MINGSIAN R. BAI, MENG-CHUN CHEN