Abstract: A writing method for a resistive memory apparatus is provided. In the method, logic data is received, and a corresponding selection memory cell is selected. A logic level of the logic data is determined. When the logic data is at a first logic level, a RESET pulse is provided to the selection memory cell and then a SET pulse smaller than a reference write current and having a near-rectangular pulse width is provided to the selection memory cell during a writing period. When the logic data is at a second logic level, the RESET pulse is provided to the selection memory cell and then a SET pulse larger than the reference write current and having the near-rectangular pulse width is provided to the selection memory cell during the writing period.

Abstract: A writing method for a resistive memory apparatus is provided. In the method, logic data is received, and a corresponding selection memory cell is selected. A logic level of the logic data is determined. When the logic data is at a first logic level, a RESET pulse is provided to the selection memory cell and then a SET pulse smaller than a reference write current and having a near-rectangular pulse width is provided to the selection memory cell during a writing period. When the logic data is at a second logic level, the RESET pulse is provided to the selection memory cell and then a SET pulse larger than the reference write current and having the near-rectangular pulse width is provided to the selection memory cell during the writing period.

Abstract: A resistive random access memory (RRAM) including a first electrode, a second electrode, and a variable-resistance oxide layer disposed between the first electrode and the second electrode is provided. The RRAM further includes an oxygen exchange layer, an oxygen-rich layer, and a first oxygen barrier layer. The oxygen exchange layer is disposed between the variable-resistance oxide layer and the second electrode. The oxygen-rich layer is disposed between the oxygen exchange layer and the second electrode. The first oxygen barrier layer is disposed between the oxygen exchange layer and the oxygen-rich layer.

Abstract: A resistive memory apparatus and a writing method thereof are provided. In the method, logic data is received, and a corresponding resistive memory cell is selected. A logic level of the logic data is determined. When the logic data is in a first logic level, where a first reading current of the corresponding resistive memory cell is greater than a first reference current, a set pulse and a reset pulse are provided to the resistive memory cell during a writing period. When the logic data is in a second logic level, where a second reading current of the resistive memory cell is smaller than a second reference current, the reset pulse is provided to the resistive memory cell during the writing period. Polarities of the reset pulse and the set pulse are opposite.

Abstract: A resistive memory apparatus and a reading method thereof are provided. In this method, two reading pulses are applied to a resistive memory cell, such that a first reading resistance and a second reading resistance of the resistive memory cell at different temperatures are sequentially obtained. Next, a resistive state of the second reading resistance is determined according to the reading resistances and the temperatures corresponding to the reading resistances. Thereafter, a logic level of storage data of the resistive memory cell is determined according to the resistive state of the second reading resistance.

Abstract: A resistive memory and a repairing method of the resistive memory are provided. Steps of the repairing method includes: operating a plurality of set-reset cycles on the resistive memory; detecting whether the resistive memory encounters an over-set issue after the set-reset cycles are operated; if the resistive memory encounters the over-set issue, executing an enhanced reset programming on the resistive memory. Here, the enhanced reset programming is executed by applying an enhanced reset voltage on the resistive memory during an enhanced reset time period. A product of the enhanced reset voltage and the enhanced reset time period is larger than a product of a reset voltage and a reset time period.

Abstract: A resistive memory and a repairing method of the resistive memory are provided. Steps of the repairing method includes: operating a plurality of set-reset cycles on the resistive memory; detecting whether the resistive memory encounters an over-set issue after the set-reset cycles are operated; if the resistive memory encounters the over-set issue, executing an enhanced reset programming on the resistive memory. Here, the enhanced reset programming is executed by applying an enhanced reset voltage on the resistive memory during an enhanced reset time period. A product of the enhanced reset voltage and the enhanced reset time period is larger than a product of a reset voltage and a reset time period.

Abstract: An operation method of a resistive random access memory (RRAM) cell is provided, wherein the RRAM cell includes a variable impedance element and a switch element connected in series. The operation method includes the following steps. When the switch element is turned-on, a writing signal is provided to the variable impedance element to set an impedance of the variable impedance element. In a first period, the writing signal is set to a first writing voltage level to transmit a first electrical energy to the variable impedance element. In a second period, a second electrical energy is transmitted to the variable impedance element by the writing signal. The second period is subsequent to the first period, the first electrical energy and the second electrical energy are greater than zero, and the second electrical energy is smaller than the first electrical energy.

Abstract: Provided is a resistive random access memory including a first electrode layer, a second electrode layer, and a variable resistance layer disposed between the first electrode layer and the second electrode layer, wherein the second electrode layer includes a first sublayer, a second sublayer, and a conductive metal oxynitride layer disposed between the first sublayer and the second sublayer.

Abstract: Provided is a resistive random access memory including a first electrode layer, a second electrode layer, and a variable resistance layer disposed between the first electrode layer and the second electrode layer, wherein the second electrode layer includes a first sublayer, a second sublayer, and a conductive metal oxynitride layer disposed between the first sublayer and the second sublayer.

Abstract: A roaming system using a wireless access controller to select an access point and the method thereof are provided. By sending a signal strength between a station and access points (AP's) detecting the station from each AP to a wireless access controller (WAC), and notifying the station to select one of the APs to connect according to the signal strength between the station and each AP by the WAC, the system and the method can keep connection quality and transmission efficiency of a station, and achieve the effect of fast roaming.

Abstract: A roaming system using a wireless access controller to select an access point and the method thereof are provided. By sending a signal strength between a station and access points (AP's) detecting the station from each AP to a wireless access controller (WAC), and notifying the station to select one of the APs to connect according to the signal strength between the station and each AP by the WAC, the system and the method can keep connection quality and transmission efficiency of a station, and achieve the effect of fast roaming.

Abstract: An LED driving circuit includes a current selecting circuit. The current selecting circuit controls the current transmission path in the plurality of LEDs according to respective threshold voltages of corresponding LEDs and a plurality of current limits.

Abstract: An LED driving circuit includes a current selecting circuit. The current selecting circuit controls the current transmission path in the plurality of LEDs according to respective threshold voltages of corresponding LEDs and a plurality of current limits.