Abstract: A method of packaging a semiconductor device includes: bonding a ball at an end of a bond wire to a bond pad of a semiconductor device die in an aperture of a shielding layer of the semiconductor device; and sealing the part of the bond pad exposed by the aperture of the shielding layer by deforming the ball of the bond wire to fill the aperture of the shielding layer. The aperture of the shielding layer includes an edge wall, and exposes a part of the bond pad. The shielding layer covers a remaining part of the bond pad. The aperture of the shielding layer is completely filled with the ball of the bond wire, thereby deforming the edge wall of the shielding layer.

Abstract: According to a first aspect of the present invention there is provided a quad-flat-no-leads (QFN) packaged semiconductor device having a QFN bottom surface and QFN side faces, wherein the QFN side faces each comprise an upper portion and a recessed lower portion, the QFN packaged semiconductor device comprising: a die pad within or on the QFN bottom surface; a plurality of I/O terminals spaced apart from the die pad and around a periphery of the bottom surface, each having a bottom face extending from an inner end to a peripheral end, an exposed side face on a QFN side face and extending above the recessed lower portion of the QFN side face; wherein the QFN bottom surface includes at least one trench therein, parallel to a one of the QFN side faces and exposing at least a part of a side face of the inner end of the I/O terminals. The trench may provide for additional surface area, and provide a stronger solder joint when the QFN packaged semiconductor device is soldered to a substrate or circuit board.

Abstract: A power die package includes a lead frame having a flag with power leads on one lateral side and signal leads on one or more other lateral sides. A power die is attached to a bottom surface of the flag and electrically connected to the power leads with a conductive epoxy. A control die is attached to a top surface of the flag and electrically connected to the signal leads with bond wires. A mold compound is provided that encapsulates the dies, the bond wires, and proximal parts of the leads, while distal ends of the leads are exposed, forming a PQFN package.

Abstract: A flexible semiconductor device includes a first tape having bonding pads and conductive traces formed. A semiconductor die having a bottom surface is attached to the first tape and electrically connected to the bond pads by way of electrical contacts. A second tape is attached to a top surface of the semiconductor die. The first and second tapes encapsulate the semiconductor die, the electrical contacts, and at least a part of the conductive traces.

Abstract: A Quad Flat No-Lead (QFN) package comprises a semiconductor die, a lead frame and molding compound. The lead frame comprises a die pad having a substantially rectangular inner part and a plurality of protrusions around the periphery thereof and contiguous therewith and extending outwardly therefrom, and a plurality of leads around the four sides of the die-pad. The molding compound encapsulates the semiconductor die and forming the package. The molding compound has a respective moat therein between each side of the die pad and a respective set of leads. The die pad has a plurality of trenches extending from the second surface of the die pad towards the first surface at least in the inner part of the die pad. The plurality of the trenches each extend across a protrusion to the moat.

Abstract: A semiconductor device is assembled using a lead frame having leads that surround a central opening. The leads have proximal ends near to the central opening and distal ends spaced from the central opening. A heat sink is attached to a bottom surface of the leads and a semiconductor die is attached to a top surface of the leads, where the die is supported on the proximal ends of the leads and spans the central opening. Bond wires electrically connect electrodes on an active surface of the die and the leads. An encapsulant covers the bond wires and at least the top surface of the leads and the die. The distal ends of the leads are exposed to allow external electrical communication with the die.

Abstract: A semiconductor device is assembled using a lead frame having leads that surround a central opening. The leads have proximal ends near to the central opening and distal ends spaced from the central opening. A heat sink is attached to a bottom surface of the leads and a semiconductor die is attached to a top surface of the leads, where the die is supported on the proximal ends of the leads and spans the central opening. Bond wires electrically connect electrodes on an active surface of the die and the leads. An encapsulant covers the bond wires and at least the top surface of the leads and the die. The distal ends of the leads are exposed to allow external electrical communication with the die.

Abstract: A power die package includes a lead frame having a flag with power leads on one lateral side and signal leads on one or more other lateral sides. A power die is attached to a bottom surface of the flag and electrically connected to the power leads with a conductive epoxy. A control die is attached to a top surface of the flag and electrically connected to the signal leads with bond wires. A mold compound is provided that encapsulates the dies, the bond wires, and proximal parts of the leads, while distal ends of the leads are exposed, forming a PQFN package.

Abstract: A flexible semiconductor device includes a first tape having bonding pads and conductive traces formed. A semiconductor die having a bottom surface is attached to the first tape and electrically connected to the bond pads by way of electrical contacts. A second tape is attached to a top surface of the semiconductor die. The first and second tapes encapsulate the semiconductor die, the electrical contacts, and at least a part of the conductive traces.

Abstract: A semiconductor sensor device includes a lead frame flag having a vent hole, an interposer mounted on the flag and having a vent hole in fluid communication with the vent hole of the flag, and a sensor die having an active region. The sensor die is mounted on and electrically connected to the interposer in a flip-chip manner such that the vent hole of the interposer is in fluid communication with the active region of the sensor die. Bond wires electrically connect the interposer to one or more other components of the device. A molding compound covers the sensor die, the interposer, and the bond wires. The sensor die may be a pressure-sensing (P-cell) die, and the device may also include a micro-controller unit (MCU) die and an acceleration-sensing (G-cell) die, for tire pressure monitoring applications.

Abstract: Embodiments of packaged semiconductor devices and lead frames for such devices are provided, such as a lead frame including: a row of lead fingers, wherein an outer end of each lead finger is connected to a leaded side of the lead frame; a package body perimeter that indicates placement of a package body of the packaged semiconductor device, wherein an inner end of each lead finger falls within the package body perimeter; a retention tab that protrudes from an interior edge of a non-leaded side of the lead frame, wherein the retention tab falls outside of the package body perimeter; and a non-conductive tie bar structure attached to the retention tab, wherein the non-conductive tie bar structure falls within the package body perimeter.

Abstract: Embodiments of packaged semiconductor devices and lead frames for such devices are provided, such as a lead frame including: a row of lead fingers, wherein an outer end of each lead finger is connected to a leaded side of the lead frame; a package body perimeter that indicates placement of a package body of the packaged semiconductor device, wherein an inner end of each lead finger falls within the package body perimeter; a retention tab that protrudes from an interior edge of a non-leaded side of the lead frame, wherein the retention tab falls outside of the package body perimeter; and a non-conductive tie bar structure attached to the retention tab, wherein the non-conductive tie bar structure falls within the package body perimeter.

Abstract: A flexible semiconductor device includes a first tape having bonding pads and conductive traces formed. A semiconductor die having a bottom surface is attached to the first tape and electrically connected to the bond pads by way of electrical contacts. A second tape is attached to a top surface of the semiconductor die. The first and second tapes encapsulate the semiconductor die, the electrical contacts, and at least a part of the conductive traces.

Abstract: A semiconductor sensor device includes a lead frame flag having a vent hole, an interposer mounted on the flag and having a vent hole in fluid communication with the vent hole of the flag, and a sensor die having an active region. The sensor die is mounted on and electrically connected to the interposer in a flip-chip manner such that the vent hole of the interposer is in fluid communication with the active region of the sensor die. Bond wires electrically connect the interposer to one or more other components of the device. A molding compound covers the sensor die, the interposer, and the bond wires. The sensor die may be a pressure-sensing (P-cell) die, and the device may also include a micro-controller unit (MCU) die and an acceleration-sensing (G-cell) die, for tire pressure monitoring applications.

Abstract: A lead frame for a packaged integrated circuit (IC) device has a die receiving area and leads that extend outwardly from the die receiving area. The leads have an inner lead area proximate the die receiving area and an outer lead area distant from the die receiving area. Notches are formed in a surface of alternate ones of the leads, in the inner lead area proximate to the outer lead area. The notches facilitate bending of the alternate leads when the leads are subjected to a downward force by a mold tool, such that one set of leads lies in a first plane and another set lies in a second plane spaced from the first plane. The leads in the first plane can be formed into Gull Wing leads and the other set of leads into J-leads.

Abstract: A lead frame for a packaged integrated circuit (IC) device has a die receiving area and leads that extend outwardly from the die receiving area. The leads have an inner lead area proximate the die receiving area and an outer lead area distant from the die receiving area. Notches are formed in a surface of alternate ones of the leads, in the inner lead area proximate to the outer lead area. The notches facilitate bending of the alternate leads when the leads are subjected to a downward force by a mold tool, such that one set of leads lies in a first plane and another set lies in a second plane spaced from the first plane. The leads in the first plane can be formed into Gull Wing leads and the other set of leads into J-leads.

Abstract: A lead frame for a packaged integrated circuit (IC) device has alternating first and second leads that protrude from a package body in respective first and second planes, where the second plane is parallel to and below the first plane. The first leads are formed into Gull Wing shaped leads and the second leads are formed into J-shaped leads. Inner lead portions of the first and second leads are maintained in the first plane with a tape. An inner lead portion of each of the second leads, proximate to and extending to the outer lead portion, is down-set, so that when the outer lead portion is pressed down by a mold tool to locate the outer lead portion of the second leads in the second plane, the inner lead portion of the second leads is maintained in the first plane and does not separate from the tape.

Abstract: A semiconductor device includes a lead frame having leads arranged in an array that has columns extending in a first direction and rows extending in a second direction. Each lead includes a bond pad portion and a solder pad portion down-set from the bond pad portion. The solder pad portion horizontally extends from the bond pad portion in the first direction. A semiconductor die is mounted on a set of the plurality of leads and electrically connected to the bond pad portion of at least one of the plurality of leads. The semiconductor die, and the plurality of leads are encapsulated by a molding material, wherein the molding material defines a package body, and the solder pad portion of each lead is exposed at a back side of the package body.

Abstract: A lead frame for a packaged integrated circuit (IC) device has alternating first and second leads that protrude from a package body in respective first and second planes, where the second plane is parallel to and below the first plane. The first leads are formed into Gull Wing shaped leads and the second leads are formed into J-shaped leads. Inner lead portions of the first and second leads are maintained in the first plane with a tape. An inner lead portion of each of the second leads includes a deformation area that facilitates maintaining the tape in contact with the inner lead area of the second leads, even when a mold tool presses down on an outer lead side of the second leads to place the outer lead ends of the second leads in the second plane.

Abstract: A woven signal-routing substrate for a wearable electronic device has conductive warps and wefts that are woven with each other and with insulative warps and wefts. Woven electrical cross-connections are formed at some of the intersections of the conductive warps and wefts, while no electrical cross-connections are formed at other intersections, to provide a signal-routing architecture for the substrate that can be used to route signals between electronic components of the wearable device. Non-connecting intersections are formed using insulative warps that are sufficiently thicker than the relatively thin conductive warps to enable a conductive weft to cross a conductive warp without making physical contact at intersection locations where an electrical cross-connection is not desired. The woven electrical cross-connections may be formed at other intersection locations using weaving topologies that ensure that the corresponding mutually orthogonal warps and wefts do contact one another.