Patents by Inventor Meng Kong Lye
Meng Kong Lye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180102305Abstract: A semiconductor device includes a lead frame having leads arranged in an array that has columns extending in a first direction and rows extending in a second direction. Each lead includes a bond pad portion and a solder pad portion down-set from the bond pad portion. The solder pad portion horizontally extends from the bond pad portion in the first direction. A semiconductor die is mounted on a set of the plurality of leads and electrically connected to the bond pad portion of at least one of the plurality of leads. The semiconductor die, and the plurality of leads are encapsulated by a molding material, wherein the molding material defines a package body, and the solder pad portion of each lead is exposed at a back side of the package body.Type: ApplicationFiled: December 15, 2016Publication date: April 12, 2018Inventors: ZHIJIE WANG, ZHIGANG BAI, YOU GE, MENG KONG LYE
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Publication number: 20170358525Abstract: A flexible semiconductor device includes a first tape having bonding pads and conductive traces formed. A semiconductor die having a bottom surface is attached to the first tape and electrically connected to the bond pads by way of electrical contacts. A second tape is attached to a top surface of the semiconductor die. The first and second tapes encapsulate the semiconductor die, the electrical contacts, and at least a part of the conductive traces.Type: ApplicationFiled: November 30, 2016Publication date: December 14, 2017Inventors: YOU GE, Meng Kong Lye, Zhijie Wang
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Patent number: 9633959Abstract: An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO pads adjacent to the corner IO pads have shortened passivation regions in the top metal layer (TML) that define TML access regions. TML traces run through the TML access regions to connect the corner IO pads to the die interior. Providing corner IO pads enables an IC die to have up to four more IO pads than a comparable conventional IC die that does not have any corner IO pads, or an IC die to have the same number of IO pads within a smaller overall footprint.Type: GrantFiled: February 11, 2015Date of Patent: April 25, 2017Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Shailesh Kumar, Vikas Garg, Meng Kong Lye
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Patent number: 9548255Abstract: An integrated circuit (IC) package has a base, side walls mechanically connected to the base, IC dies respectively mounted on inner surfaces of the side walls or the base, and electrical connections connecting a corresponding IC die to another component of the IC package. In one embodiment, each die is electrically connected to only bond pads on its corresponding side wall or base. Each such side wall and the base have routing structures (e.g., copper traces) that connect each bond pad to another component of the IC package. The IC package is assembled using a flexible substrate that has side regions that rotate relative to the base such that the routing structures do not break. By connecting an IC die only to bond pads on its corresponding side wall or base with bond wires, the bond wires will not break during side-wall rotation.Type: GrantFiled: April 27, 2016Date of Patent: January 17, 2017Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: You Ge, Meng Kong Lye, Zhijie Wang
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Publication number: 20170009387Abstract: A woven signal-routing substrate for a wearable electronic devoce has conductive warps and wefts that are woven with each other and with insulative warps and wefts. Woven electrical cross-connections are formed at some of the intersections of the conductive warps and wefts, while no electrical cross-connections are formed at other intersections, to provide a signal-routing architecture for the substrate that can be used to route signals between electronic components of the wearable device. Non-connecting intersections are formed using insulative warps that are sufficiently thicker than the relatively thin conductive warps to enable a conductive weft to cross a conductive warp without making physical contact at intersection locations where an electrical cross-connection is not desired. The woven electrical cross-connections may be formed at other intersection locations using weaving topologies that ensure that the corresponding mutually orthogonal warps and wefts do contact one another.Type: ApplicationFiled: January 6, 2016Publication date: January 12, 2017Inventors: You Ge, Meng Kong Lye, Zhijie Wang
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Patent number: 9484289Abstract: A semiconductor device includes a package body, a semiconductor die embedded in the package body and a heat spreader attached to a top surface of the package body and spaced from semiconductor die. The heat spreader may be formed of solder that is melted within a recess in the top surface of the package body.Type: GrantFiled: August 19, 2014Date of Patent: November 1, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: You Ge, Meng Kong Lye, Penglin Mei
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Publication number: 20160293526Abstract: A packaged integrated circuit (IC) device having a heatsink mounted onto an IC die, itself mounted onto a die pad, is assembled using a lead frame having tie bars that deflect during an encapsulation phase of the device assembly, which enables the die pad, the die, and the heatsink to move relative to the lead frame support structure when compressive force is applied by the molding tool. This movement results in negligible relative displacement between the heatsink and the die during encapsulation, which reduces the probability of physical damage to the die. Each tie bar has a number of differently angled sections that enable it to deflect when compressive force is applied to it.Type: ApplicationFiled: October 19, 2015Publication date: October 6, 2016Applicant: Freescale Semiconductor, Inc.Inventors: Zhijie Wang, Zhigang Bai, You Ge, Meng Kong Lye
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Patent number: 9449901Abstract: A packaged integrated circuit (IC) device having a heatsink mounted onto an IC die, itself mounted onto a die pad, is assembled using a lead frame having tie bars that deflect during an encapsulation phase of the device assembly, which enables the die pad, the die, and the heatsink to move relative to the lead frame support structure when compressive force is applied by the molding tool. This movement results in negligible relative displacement between the heatsink and the die during encapsulation, which reduces the probability of physical damage to the die. Each tie bar has a number of differently angled sections that enable it to deflect when compressive force is applied to it.Type: GrantFiled: October 19, 2015Date of Patent: September 20, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Zhijie Wang, Zhigang Bai, You Ge, Meng Kong Lye
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Publication number: 20160233183Abstract: An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO pads adjacent to the corner IO pads have shortened passivation regions in the top metal layer (TML) that define TML access regions. TML traces run through the TML access regions to connect the corner IO pads to the die interior. Providing corner IO pads enables an IC die to have up to four more IO pads than a comparable conventional IC die that does not have any corner IO pads, or an IC die to have the same number of IO pads within a smaller overall footprint.Type: ApplicationFiled: February 11, 2015Publication date: August 11, 2016Inventors: Shailesh Kumar, Vikas Garg, Meng Kong Lye
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Patent number: 9379035Abstract: A multi-component integrated circuit (IC) package has a base component (e.g., an interposer) defining a base of the IC package, a plurality of die pads extending from the base and forming side walls of the IC package, one or more IC dies, each mounted on an interior surface of one of the die pads, and bond wires electrically connecting the IC dies to another component of the IC package, such as the interposer or another die. By mounting dies on non-horizontal side walls, the IC package can provide more-effective thermal dissipation than conventional 3D IC packages having stacks of IC dies.Type: GrantFiled: September 11, 2015Date of Patent: June 28, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: You Ge, Meng Kong Lye, Zhijie Wang
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Patent number: 9355945Abstract: A packaged semiconductor device has a top and a bottom and includes a lead frame, a die, and an encapsulant that encapsulates the die and most of the lead frame. The lead frame includes a die pad on which the die is mounted, leads electrically connected to the die such as with bond wires, and die pad extensions that fan out from the die pad. Each die-pad extension has a proximal segment and a distal segment. The distal segments are interleaved with the leads. The bottoms of the die pad and the proximal segments of the extensions may be exposed at the bottom of the device. The top of the device may have notches corresponding to the extensions and portions of the distal segments may be exposed and bent into corresponding ones of the notches at the top of the device.Type: GrantFiled: September 2, 2015Date of Patent: May 31, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: You Ge, Meng Kong Lye, Zhijie Wang
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Patent number: 9337140Abstract: A semiconductor device includes a semiconductor die having opposing first and second main surfaces, contact pads and a metal ring accessible from the first main surface, and signal leads surrounding and spaced from the die. Each of the signal leads has a first end near the die, a second end remote from the die, and a body extending between the first and second ends. A dummy lead frame is disposed between the signal leads first ends and the die, and connected to a fixed potential. First bond wires are coupled to respective ones of the signal leads and the contact pads. Second, shield bond wires, located adjacent to respective ones of the bond wires, are coupled to the dummy lead frame and the metal ring.Type: GrantFiled: September 1, 2015Date of Patent: May 10, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Shailesh Kumar, Rishi Bhooshan, Meng Kong Lye, Sumit Varshney, Chetan Verma
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Patent number: 9196578Abstract: A semiconductor package has multiple dies and an interior power bar that extends within an interior space formed within the die flag between the dies. The bond pads located on the interior side of each die are wire-bonded to the interior power bar. Some embodiments may have more than two dies and/or more than one interior power bar between each pair of adjacent dies.Type: GrantFiled: August 14, 2014Date of Patent: November 24, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Sheau Mei Lim, Meng Kong Lye, Pei Fan Tong
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Patent number: 9196576Abstract: A semiconductor device has a die mounted on a die paddle that is elevated above and thermally connected via tie bars to a heat sink structure. Heat generated by the die flows from the die to the die paddle to the tie bars to the heat sink structure and then to either the external environment or to an external heat sink. By elevating the die/paddle sub-assembly above the heat sink structure, the packaged device is less susceptible to delamination between the die and die attach adhesive and/or the die attach adhesive and the die paddle. An optional heat sink ring can surround the die paddle.Type: GrantFiled: May 15, 2014Date of Patent: November 24, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Kai Yun Yow, Poh Leng Eu, Meng Kong Lye, You Ge, Penglin Mei
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Patent number: 9190343Abstract: A packaged semiconductor device having an integrated circuit (IC) die, a flexible tube, and a metal slug. During assembly, a first end of the tube is mounted on a surface of the IC die and a second end of the tube extends away from the die surface. The exposed portions of the surface of the IC die are encased in a molding compound, which also encases the perimeter of the tube. After molding, the tube may be filled with metal to improve conduction of heat away from the die top. If the tube is formed of a soft material like rubber then the tube will not damage the die top during attachment thereto.Type: GrantFiled: November 26, 2014Date of Patent: November 17, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: You Ge, Meng Kong Lye, Zhijie Wang
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Patent number: 9177834Abstract: A semiconductor device includes a semiconductor die encapsulated in a package casing and having four main side walls each oriented generally parallel with one of first or second orthogonal directions. Signal leads are electrically coupled to the die and each has an exposed portion that extends from one of the main side walls parallel with one of the first or second directions. One or more power bars are electrically coupled to the die and each has at least one power bar lead extending at a non-zero angle with respect to the first and second directions. The power bars and associated power bar leads are electrically isolated from the signal leads. One or more tie bars extends at a generally non-zero angle with respect to the first and second directions and is electrically isolated from the signal leads and the power bars and associated power bar leads.Type: GrantFiled: February 19, 2014Date of Patent: November 3, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Chee Seng Foong, Meng Kong Lye, Lan Chu Tan, Seng Kiong Teng
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Patent number: 9165869Abstract: A lead frame for a semiconductor device has a die flag and leads that surround the die flag. In order to decrease the distance or spacing between inner lead ends and the die flag, which allows for short bond wires for connecting the inner lead ends to a die mounted on the die flag, at least some of the leads are twisted along their lengths to be angled with respect to a die-flag plane. The pitch between such twisted leads can be reduced without resulting in physical contact between adjacent leads, enabling the leads to extend further towards the die flag.Type: GrantFiled: July 11, 2014Date of Patent: October 20, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Soo Choong Chee, Meng Kong Lye, Wai Keong Wong
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Patent number: 9147656Abstract: A shielding structure for use with semiconductor devices. The shielding structure has a base with fingers that are sized and shaped to extend within the space between pairs of adjacent leads. The base extends within the space between the die flag and the leads. The shielding structure is further connected to one of the grounded leads.Type: GrantFiled: July 11, 2014Date of Patent: September 29, 2015Assignee: FREESCALE SEMICONDUTOR, INC.Inventors: Sumit Varshney, Rishi Bhooshan, Meng Kong Lye, Chetan Verma
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Publication number: 20150235924Abstract: A semiconductor device includes a semiconductor die encapsulated in a package casing and having four main side walls each oriented generally parallel with one of first or second orthogonal directions. Signal leads are electrically coupled to the die and each has an exposed portion that extends from one of the main side walls parallel with one of the first or second directions. One or more power bars are electrically coupled to the die and each has at least one power bar lead extending at a non-zero angle with respect to the first and second directions. The power bars and associated power bar leads are electrically isolated from the signal leads. One or more tie bars extends at a generally non-zero angle with respect to the first and second directions and is electrically isolated from the signal leads and the power bars and associated power bar leads.Type: ApplicationFiled: February 19, 2014Publication date: August 20, 2015Inventors: Chee Seng Foong, Meng Kong Lye, Lan Chu Tan, Seng Kiong Teng
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Publication number: 20150108625Abstract: A semiconductor device includes a package body, a semiconductor die embedded in the package body and a heat spreader attached to a top surface of the package body and spaced from semiconductor die. The heat spreader may be formed of solder that is melted within a recess in the top surface of the package body.Type: ApplicationFiled: August 19, 2014Publication date: April 23, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: You Ge, Meng Kong Lye, Penglin Mei