Patents by Inventor Meng LIANG
Meng LIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12289392Abstract: Embodiments of the invention relate to symmetric encryption that converts plain text to Diophantine equations, i.e. cipher text, and communication of the Diophantine equations by electromagnetic, mechanical and/or matter waves or signals. More particularly, at least one wave characteristic of electromagnetic, mechanical and/or matter waves or signals are utilised to define the Diophantine equations.Type: GrantFiled: August 18, 2022Date of Patent: April 29, 2025Assignee: Aires Investment Holdings Private LimitedInventor: Meng Liang Lim
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Patent number: 12288918Abstract: There is provided a phase shifter having a phase shift region and a peripheral region, and including a first substrate, a second substrate and a dielectric layer between such two substrates; the first substrate includes a first dielectric substrate, a first electrode and a first auxiliary structure; the second substrate includes a second dielectric substrate, a second electrode and a second auxiliary structure; the phase shift region includes overlapping regions; the first electrode and the second electrode are located in the phase shift region, and have orthographic projections, on the first dielectric substrate, overlapped at least partially in the overlapping regions; the first auxiliary structure is in the peripheral region and on a side, close to the dielectric layer, of the first dielectric substrate; the second auxiliary structure is in the peripheral region and on a side, close to the dielectric layer, of the second dielectric substrate.Type: GrantFiled: January 27, 2022Date of Patent: April 29, 2025Assignees: Beijing BOE Sensor Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xiaobo Wang, Haocheng Jia, Chuncheng Che, Zhifeng Zhang, Cuiwei Tang, Yong Liu, Honggang Liang, Sheng Chen, Xueyan Su, Hailong Lian, Yi Ding, Jing Xie, Wei Zhang, Weisi Zhou, Meng Wei, Jing Wang, Zhenguo Zhang, Feng Qu
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Patent number: 12289678Abstract: Disclosed are an SCG state control method and apparatus, a UE, an MN, an SN, and a medium. The method comprises: a UE determining whether there is data transmission at an SCG; when it is determined that there is no data transmission at the SCG, controlling a PSCell in the SCG to enter a sleep state; and when it is determined that there is data transmission at the SCG, controlling the PSCell in the SCG to enter an activated state. In the embodiments of the present application, when it is determined that there is no data transmission at an SCG, a UE controls a PSCell in the SCG to enter a sleep state, thereby avoiding wasteful power consumption; moreover, there is no need to release the SCG, such that there is also no need to configure the SCG again when data transmission is initiated at an SCG side again, and data transmission is scheduled at the SCG in a timely manner according to a CSI measurement result reported when the PSCell is in the sleep state, thereby reducing the data transmission delay.Type: GrantFiled: January 14, 2020Date of Patent: April 29, 2025Assignee: Datang Mobile Communications Equipment Co., Ltd.Inventors: Meng Xu, Jing Liang
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Publication number: 20250130903Abstract: A method, computer system, and a computer program product are provided for backup and restoration of data. Data is obtained from a plurality of resources during a plurality of tasks. The resources are located in one or more computing networks. A plurality of parameters are extracted from obtained data. A table is generated and stored that includes the parameters extracted and an associated related task. A predict time is calculated based on the table for recovery of data when any of the resources become unavailable. A task priority is established based on calculated predict time and the table to optimize and improve the predict recovery time. A restoration model is generated based on updated restoration recommendation. The restoration model is to be used during resource unavailability or failure of one or more of the resources.Type: ApplicationFiled: October 24, 2023Publication date: April 24, 2025Inventors: Tian Jia Wang, Bo Song, XIAO LIANG GE, Meng Ru Hou, Qian Qian Zhang
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Publication number: 20250132214Abstract: A semiconductor package includes a chiplet, a first underfill surrounding the chiplet, and a first encapsulant laterally covering the first underfill. The chiplet includes a semiconductor substrate and die connectors disposed over the semiconductor substrate. The first underfill includes first fillers, and a portion of the first fillers has a substantially planar surface at a first surface of the first underfill. The first encapsulant includes a first surface and a second surface opposite to the first surface, the first surface is substantially leveled with surfaces of the die connectors, and the second surface is substantially leveled with the first surface of the first underfill.Type: ApplicationFiled: October 19, 2023Publication date: April 24, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Meng-Liang Lin, Ying-Ju Chen, Shin-Puu Jeng
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Publication number: 20250132296Abstract: A semiconductor package includes an interposer including a first redistribution structure, a first semiconductor die electrically coupled to the first redistribution structure through conductive joints, and a first encapsulant disposed on the first redistribution structure and laterally covering the first semiconductor die. The first semiconductor die includes a semiconductor substrate including a first side facing the first redistribution structure and a second side opposite to the first side, a through substrate via provided within the semiconductor substrate, and a passive device disposed between the second side of the semiconductor substrate and the conductive joints.Type: ApplicationFiled: October 24, 2023Publication date: April 24, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Meng-Liang Lin, Shin-Puu Jeng
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Publication number: 20250126817Abstract: The present disclosure relates to semiconductor structures and, more particularly, to silicon controlled rectifiers and methods of manufacture. The structure includes: a plurality of wells of a first conductivity type; a well of a second conductivity type which is different than the first conductivity type; an intrinsic semiconductor region between the well and the plurality of wells; and contacts within the plurality of wells.Type: ApplicationFiled: October 17, 2023Publication date: April 17, 2025Inventors: Meng Miao, Alain Loiseau, Lin Lin, Jing Wan, Wei Liang, Anindya Nath, Sagar Premnath Karalkar, Souvick Mitra, Xunyu Li, Mengfu Di
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Patent number: 12278213Abstract: A display substrate and a display device are provided. The display substrate includes a backplane including a plurality of pixel regions; and light emitting units arranged in one-to-one correspondence with the plurality of pixel regions. Each light emitting unit includes light emitting sub-units arranged in a plurality of rows and a plurality of columns, each row of light emitting sub-units includes a plurality of light emitting sub-units arranged along a row direction, each column of light emitting sub-units includes one light emitting sub-unit, and orthographic projections of light emitting regions of two adjacent columns of light emitting sub-units on a first straight line extending along a column direction are not overlapped; and in each light emitting unit, there is no gap between orthographic projections of the light emitting regions of the two adjacent columns of light emitting sub-units on a second straight line extending along the row direction.Type: GrantFiled: October 21, 2020Date of Patent: April 15, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Mingxing Wang, Meng Yan, Qingxun Zhang, Qian Wu, Xuan Feng, Xiawei Yun, Guangcai Yuan, Xue Dong, Muxin Di, Zhiwei Liang, Ke Wang
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Patent number: 12279165Abstract: Disclosed are a method and a device for measuring and reporting channel state information (CSI). The method for measuring and reporting channel state information (CSI) includes a terminal device performing, on a specified bandwidth part (BWP) and within specified time, a CSI measurement, according to a first measurement configuration, to obtain CSI measurement results; and the terminal device reporting, on the specified BWP, the CSI measurement results to a network device, the terminal device performing a CSI measurement according to a second measurement configuration outside the specified time.Type: GrantFiled: January 14, 2020Date of Patent: April 15, 2025Assignee: DATANG MOBILE COMMUNICATIONS EQUIPMENT CO., LTD.Inventors: Meng Xu, Jing Liang, Jing Fu
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Publication number: 20250117615Abstract: Embodiments of the invention provide a two-dimensional code which comprises a plurality of optically readable and distinct indicia which are arranged on a two-dimensional area, wherein the indicia include a reference indicium and further includes at least one data indicium which represents at least one data value respectively, wherein the at least one data value is represented by at least one distance between the reference indicium and the at least one data indicium, and at least one angular displacement of the at least one data indicium which is relative to a reference direction, and wherein the reference direction is based on at least one of the indicia which is asymmetric or includes at most one line of symmetry. FIG.Type: ApplicationFiled: May 19, 2023Publication date: April 10, 2025Applicant: Aires Investment Holdings Private LimitedInventor: Meng Liang LIM
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Publication number: 20250118984Abstract: Provided are an energy storage system and a control system and a control method of the energy storage system. The energy storage system includes a converter valve and an energy storage valve, the energy storage valve is connected to a direct-current side of the converter valve, and the control system includes: a coordination control subsystem, a converter valve control subsystem, and an energy storage valve control subsystem; the coordination control subsystem is used for sending an instruction to control the converter valve control subsystem and the energy storage valve control subsystem to work; the converter valve control subsystem is used for controlling, according to the instruction of the coordination control subsystem, the converter valve to work; and the energy storage valve control subsystem is used for controlling, according to the instruction of the coordination control subsystem, the energy storage valve to work.Type: ApplicationFiled: November 28, 2024Publication date: April 10, 2025Inventors: Liliuyuan Liang, Yanhua Lu, Dongxu Yu, Guoxiu Wu, Xiangxiang Xu, Meng Li, Bingtuan Luo
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Publication number: 20250105080Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.Type: ApplicationFiled: December 11, 2024Publication date: March 27, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
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Patent number: 12261567Abstract: A demodulation signal generator, coupled to an air-pulse generator comprising a flap pair, includes a resonance circuit. The resonance circuit produces a first demodulation signal and a second demodulation signal. The resonance circuit and the flap pair co-perform a resonance operation, such that the first demodulation signal and the second demodulation signal are generated via the co-performed resonance operation and have opposite polarity. The flap pair performs a differential movement to form an opening to perform a demodulation operation on a modulated air pressure variation.Type: GrantFiled: December 26, 2023Date of Patent: March 25, 2025Assignee: xMEMS Labs, Inc.Inventors: Jemm Yue Liang, Jing-Meng Liu, Jye Ren
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Patent number: 12261113Abstract: A semiconductor structure includes a first conductive line, a first conductive segment, a second conductive segment, and a third conductive segment. The first conductive segment is electrically coupled to the first conductive line. The second conductive segment is electrically coupled the first conductive segment. The second conductive segment is disposed between the first conductive segment and the third conductive segment. A top surface of the first conductive segment is aligned with a top surface of the second conductive segment in a same layer.Type: GrantFiled: December 12, 2022Date of Patent: March 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Meng-Hung Shen, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Kam-Tou Sio, Wei-Cheng Lin
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Publication number: 20250087564Abstract: Semiconductor packages and methods of fabricating semiconductor packages include an interposer, at least one semiconductor integrated circuit (IC) die mounted on a first surface of the interposer, a package substrate bonded to a second surface of the interposer, and a molding portion contacting the second surface of the interposer and laterally surrounding the package substrate. The package substrate may be laterally-confined with respect to the interposer such that at least one horizontal dimension of the package substrate may be less than the corresponding horizontal dimension of the interposer. In various embodiments, reliability of the bonding connections between the interposer and the package substrate may be improved thereby providing increased yields and improved package performance.Type: ApplicationFiled: September 11, 2023Publication date: March 13, 2025Inventors: Hsien-Wei Chen, Meng-Liang Lin, Ying-Ju Chen, Shin-Puu Jeng
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Publication number: 20250089378Abstract: An electrostatic discharge (ESD) protection circuit includes a silicon controlled rectifier. The silicon controlled rectifier includes a first well of a first conductivity type in a substrate, and a first doped region of a second conductivity type and a first tap region of the first conductivity type in the first well. The second conductivity type has an opposite polarity to the first conductivity type. The first doped region is coupled to a first pad. The first tap region is coupled to a second pad through a resistor external to the silicon controlled rectifier.Type: ApplicationFiled: September 7, 2023Publication date: March 13, 2025Inventors: ALAIN F. LOISEAU, ANINDYA NATH, MENG MIAO, WEI LIANG, SOUVICK MITRA, ROBERT JOHN GAUTHIER, JR.
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Publication number: 20250079428Abstract: Packaged devices and methods of manufacturing the devices are described herein. The packaged devices may be fabricated using heterogeneous devices and asymmetric dual-side molding on a multi-layered redistribution layer (RDL) structure. The packaged devices may be formed with a heterogeneous three-dimensional (3D) Fan-Out System-in-Package (SiP) structure having small profiles and can be formed using a single carrier substrate.Type: ApplicationFiled: November 15, 2024Publication date: March 6, 2025Inventors: Yi-Wen Wu, Po-Yao Chuang, Meng-Liang Lin, Techi Wong, Shih-Ting Hung, Po-Hao Tsai, Shin-Puu Jeng
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Publication number: 20250070573Abstract: A control method of an energy storage system. The energy storage system includes a plurality of energy storage modules connected in series. The control method includes: acquiring a difference value between a first state parameter of a first energy storage module and a first state parameter of a second energy storage module among N available energy storage modules in the energy storage system, N being a positive integer greater than 1; and conducting balance control on the energy storage system according to the difference value of the first state parameters.Type: ApplicationFiled: November 13, 2024Publication date: February 27, 2025Inventors: Liliuyuan LIANG, Yanhua LU, Dongxu YU, Guoxiu WU, Meng LI, Xiangxiang XU, Bingtuan LUO
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Publication number: 20250070572Abstract: A control method of an energy storage system. The energy storage system includes N energy storage modules connected in series, and N is a positive integer greater than 1. The control method includes: acquiring a first parameter of each energy storage module among the N energy storage modules, the first parameter being a parameter related to the power; and conducting balance control on the energy storage system according to the first parameter of each energy storage module.Type: ApplicationFiled: November 5, 2024Publication date: February 27, 2025Inventors: Liliuyuan LIANG, Yanhua LU, Dongxu YU, Meng LI, Guoxiu WU, Xiangxiang XU, Bingtuan LUO
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Publication number: 20250062245Abstract: A semiconductor structure includes a circuit substrate, at least one semiconductor package, at least one semiconductor device, and a ring structure. The at least one semiconductor package is disposed on the circuit substrate, and the semiconductor package includes a plurality of integrated circuit structures. The at least one semiconductor device, disposed on the circuit substrate and aside the semiconductor package. The ring structure is disposed on the circuit board. The ring structure includes at least one opening pattern corresponding to the semiconductor device.Type: ApplicationFiled: August 15, 2023Publication date: February 20, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Meng-Liang Lin, Ying-Ju Chen, Shin-Puu Jeng