Abstract: A signal receiving circuit includes an amplifier, a mixer, and a first controlling circuit. The amplifier includes: an input stage for receiving an input signal to generate a first signal; a gain stage coupled to the input stage for generating an output signal according to the first signal; and an output stage coupled to the gain stage for adjusting a spectral response of the amplifier according to a first adjusting signal. The mixer is coupled to the gain stage for generating a converted signal according to the output signal. The first controlling circuit is coupled to the mixer for detecting the converted signal to generate the first adjusting signal to adjust the spectral response of the amplifier.

Abstract: A signal converting circuit includes: a first single-to-differential circuit arranged to generate a first signal having a first polarity and a second signal having a second polarity different from the first polarity; a second single-to-differential circuit arranged to generate a third signal having the second polarity and a fourth signal having the first polarity; and a combining circuit arranged to generate a first combined signal having the first polarity according at least two signals from the first signal, the second signal, the third signal, and the fourth signal, and output an output signal according to at least the first combined signal.

Abstract: A signal converting circuit includes: a first single-to-differential circuit arranged to generate a first signal having a first polarization and a second signal having a second polarization different from the first polarization; a second single-to-differential circuit arranged to generate a third signal having the second polarization and a fourth signal having the first polarization; and a combining circuit arranged to generate a first combined signal having the first polarization according at least two signals from the first signal, the second signal, the third signal, and the fourth signal, and output an output signal according to at least the first combined signal.

Abstract: A multimode line driver circuit is provided having improved performance. The multimode line driver comprises at least first and second driver circuits that, when “active,” respectively transmit data using first and second modes. The multimode line driver further comprises a circuit arrangement including a voltage regulator and an associated set of switches. In operation, at least some of the switches are coupled to the second driver circuit and are turned on when the first driver circuit is active. The voltage regulator supplies a direct current to at least some of the turned-on switches in order to decrease a common mode voltage at the second driver circuit while the first driver circuit transmits data using the first mode. As such, components of the second driver circuit can be powered off while the first driver circuit is active, thus reducing power consumption in the first mode.

Abstract: A multimode line driver circuit is provided having improved performance. The multimode line driver comprises at least first and second driver circuits that, when “active,” respectively transmit data using first and second modes. The multimode line driver further comprises a circuit arrangement including a voltage regulator and an associated set of switches. In operation, at least some of the switches are coupled to the second driver circuit and are turned on when the first driver circuit is active. The voltage regulator supplies a direct current to at least some of the turned-on switches in order to decrease a common mode voltage at the second driver circuit while the first driver circuit transmits data using the first mode. As such, components of the second driver circuit can be powered off while the first driver circuit is active, thus reducing power consumption in the first mode.

Abstract: A circuit capable of quiescent current control, the circuit comprising a first operational transconductance amplifier (OTA) including a first output terminal, a first transistor including a first gate coupled to the first output terminal of the first OTA, a second OTA including a second output terminal, a second transistor including a second gate coupled to the second output terminal of the second OTA, a resistive load including a first terminal coupled to the first output terminal and the first gate, and a second terminal coupled to the second terminal and the second gate, a first current source capable of providing a first current flowing toward the first terminal of the resistive load, and a second current source capable of providing a second current flowing away from the second terminal of the resistive load.

Abstract: A circuit capable of quiescent current control, the circuit comprising a first operational transconductance amplifier (OTA) including a first output terminal, a first transistor including a first gate coupled to the first output terminal of the first OTA, a second OTA including a second output terminal, a second transistor including a second gate coupled to the second output terminal of the second OTA, a resistive load including a first terminal coupled to the first output terminal and the first gate, and a second terminal coupled to the second terminal and the second gate, a first current source capable of providing a first current flowing toward the first terminal of the resistive load, and a second current source capable of providing a second current flowing away from the second terminal of the resistive load.