Patents by Inventor Meng-Ting Tsai

Meng-Ting Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154629
    Abstract: A 24 GHz band-pass filter includes a step impedance resonator, a first U-shape feeding portion, a second U-shape feeding portion, short-circuit stubs and open-circuit stubs. The step impedance resonator includes a first main portion, a second main portion, and a connection portion for connecting the main portions to each other. The first main portion and the second main portion are electrically connected to a first signal input/output port and a second signal input/output port. The first U-shape feeding portion is electrically connected between the first main portion and the first signal input/output port. The second U-shape feeding portion is electrically connected between the second main portion and the second signal input/output port. The short-circuit stubs are electrically connected to coupling segments of the step impedance resonator. The open-circuit stubs are electrically connected to the first U-shape feeding portion and the second U-shape feeding portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 9, 2024
    Inventors: Kun Yen TU, Meng-Hua TSAI, Wei Ting LEE, Sin-Siang WANG
  • Publication number: 20240147711
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Patent number: 11969518
    Abstract: The present invention provides an artificial dressing and a use of the artificial dressing for promoting wound healing. The artificial dressing includes a gelatin and a fungal extract.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: April 30, 2024
    Assignee: A.M.S. BioteQ Co., Ltd.
    Inventors: Yi-Ju Tsai, Ying-Ting Yeh, Meng-Yi Bai, Yun-Xuan Zhang
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 11916313
    Abstract: An appressed antenna includes an antenna housing and a metal shell. The antenna housing comprising a housing and a planar antenna, where the planar antenna is bent with one part folded onto the inner surface of the housing and other part pressed onto the outer surface of the housing. The antenna housing is sleeve fitted to the metal shell with a gap between for the planar antenna to radiate. In this all-metal environment, the position of the antenna is close to the gap opening will increase radiation efficiency. By having at least a branch at the tail end of the appressed antenna, the appressed antenna can have a good return loss and antenna gain.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: February 27, 2024
    Assignee: QuantumZ Inc.
    Inventors: Kun-Yen Tu, Meng-Hua Tsai, Wei-Ting Lee, Sin-Siang Wang
  • Patent number: 11671891
    Abstract: A method for UE route selection policy (URSP) rule matching is proposed. URSP is used by a UE to determine if a detected application can be associated to an established PDU session, can be offload to non-3GPP access outside a PDU session, or can trigger the establishment of a new PDU session. The UE first finds a non-default URSP rule with a matching traffic descriptor to the application. When the UE fails to find existing PDU session or setup new PDU session with any or the route selection descriptors of the non-default URSP rule, the UE moves to another non-default URSP rule, if any, and try the matching. If all non-default URSP rules cannot be matched with the application, then the UE tries the default URSP rule, which includes a match-all traffic descriptor.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: June 6, 2023
    Assignee: MediaTek INC.
    Inventors: Chien-Chun Huang-Fu, Meng-Ting Tsai
  • Publication number: 20230137727
    Abstract: A thermal radiation heat dissipation device includes a radiation heat transfer pile including a plurality of polar dielectric material units of high energy gap, the polar dielectric material units each including at least one light scattering unit and a thermal radiation unit. The light scattering unit interacts with solar radiation to generate scattering of light. The thermal radiation unit interacts with thermal radiation to increase strength of thermal radiation.
    Type: Application
    Filed: May 18, 2022
    Publication date: May 4, 2023
    Inventors: Meng-Ting Tsai, Yen-Jen Chen, Sih-Wei Chang, De-hui Wan, Hsuen-Li Chen
  • Publication number: 20210243664
    Abstract: A method for UE route selection policy (URSP) rule matching is proposed. URSP is used by a UE to determine if a detected application can be associated to an established PDU session, can be offload to non-3GPP access outside a PDU session, or can trigger the establishment of a new PDU session. The UE first finds a non-default URSP rule with a matching traffic descriptor to the application. When the UE fails to find existing PDU session or setup new PDU session with any or the route selection descriptors of the non-default URSP rule, the UE moves to another non-default URSP rule, if any, and try the matching. If all non-default URSP rules cannot be matched with the application, then the UE tries the default URSP rule, which includes a match-all traffic descriptor.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Inventors: Chien-Chun Huang-Fu, Meng-Ting Tsai
  • Patent number: 11006344
    Abstract: A method for UE route selection policy (URSP) rule matching is proposed. URSP is used by a UE to determine if a detected application can be associated to an established PDU session, can be offload to non-3GPP access outside a PDU session, or can trigger the establishment of a new PDU session. The UE first finds a non-default URSP rule with a matching traffic descriptor to the application. When the UE fails to find existing PDU session or setup new PDU session with any or the route selection descriptors of the non-default URSP rule, the UE moves to another non-default URSP rule, if any, and try the matching. If all non-default URSP rules cannot be matched with the application, then the UE tries the default URSP rule, which includes a match-all traffic descriptor.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: May 11, 2021
    Assignee: MEDIATEK INC.
    Inventors: Chien-Chun Huang-Fu, Meng-Ting Tsai
  • Publication number: 20210020905
    Abstract: A lithium ion battery silicon carbon electrode material and a preparation method thereof are provided. The lithium ion battery silicon carbon electrode material includes a graphite particle and a resin carbon layer. The resin carbon layer is smoothly coated on a surface of the graphite particle, and silicon or a silicon compound and a conductive material are coated in the resin carbon layer.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 21, 2021
    Applicant: GIGA SOLAR MATERIALS CORP.
    Inventors: Meng-Ting Tsai, Jian-Shiou Huang, Chun-Wei Hsu, Wen-Chun Yen
  • Publication number: 20200053622
    Abstract: A method for UE route selection policy (URSP) rule matching is proposed. URSP is used by a UE to determine if a detected application can be associated to an established PDU session, can be offload to non-3GPP access outside a PDU session, or can trigger the establishment of a new PDU session. The UE first finds a non-default URSP rule with a matching traffic descriptor to the application. When the UE fails to find existing PDU session or setup new PDU session with any or the route selection descriptors of the non-default URSP rule, the UE moves to another non-default URSP rule, if any, and try the matching. If all non-default URSP rules cannot be matched with the application, then the UE tries the default URSP rule, which includes a match-all traffic descriptor.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 13, 2020
    Inventors: Chien-Chun Huang-Fu, Meng-Ting Tsai
  • Patent number: 10277215
    Abstract: Digital controlled delay lines are provided. A digital controlled delay line includes a plurality of delay cells coupled in a chain forming a propagation path to propagate an input signal and to delay the input signal by a delay time. The propagation path is formed when a single delay cell is operated in a feedback mode, the delay cells previous to the single delay cell in the chain are operated in a propagation mode, a subsequent delay cell following the single delay cell in the chain is operated in a standby mode, and the delay cells following the first subsequent delay cell in the chain are operated in an idle mode.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Ting Tsai, Chien-Chun Tsai, Mu-Shan Lin, Wen-Hung Huang, Yu-Chi Chen
  • Publication number: 20180316337
    Abstract: Digital controlled delay lines are provided. A digital controlled delay line includes a plurality of delay cells coupled in a chain forming a propagation path to propagate an input signal and to delay the input signal by a delay time. The propagation path is formed when a single delay cell is operated in a feedback mode, the delay cells previous to the single delay cell in the chain are operated in a propagation mode, a subsequent delay cell following the single delay cell in the chain is operated in a standby mode, and the delay cells following the first subsequent delay cell in the chain are operated in an idle mode.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Meng-Ting TSAI, Chien-Chun TSAI, Mu-Shan LIN, Wen-Hung HUANG, Yu-Chi CHEN
  • Patent number: 10064272
    Abstract: A light emitting device includes a light source, a light source carrier and a circuit board. The circuit board is configured to provide power to the light source via the light source carrier. The circuit board includes a metal substrate having an upper surface, the upper surface including a first electrode area, a second electrode area and a heat conduction area; a first metal electrode formed on the first electrode area; a first insulation layer formed between the first metal electrode and the metal substrate; a second metal electrode formed on the second electrode area; a second insulation layer formed between the second metal electrode and the metal substrate; and a solder resist layer covering the upper surface of the metal substrate; wherein the heat conduction area is exposed from the solder resist layer, and the heat conduction area is connected to the light source carrier.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: August 28, 2018
    Assignee: GENESIS PHOTONICS INC.
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Meng-Ting Tsai
  • Publication number: 20180049319
    Abstract: A light emitting device includes a light source, a light source carrier and a circuit board. The circuit board is configured to provide power to the light source via the light source carrier. The circuit board includes a metal substrate having an upper surface, the upper surface including a first electrode area, a second electrode area and a heat conduction area; a first metal electrode formed on the first electrode area; a first insulation layer formed between the first metal electrode and the metal substrate; a second metal electrode formed on the second electrode area; a second insulation layer formed between the second metal electrode and the metal substrate; and a solder resist layer covering the upper surface of the metal substrate; wherein the heat conduction area is exposed from the solder resist layer, and the heat conduction area is connected to the light source carrier.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Meng-Ting Tsai
  • Patent number: 9801274
    Abstract: A light emitting device includes a light source, a light source carrier and a circuit board. The circuit board is configured to provide power to the light source via the light source carrier. The circuit board includes a metal substrate having an upper surface, the upper surface including a first electrode area, a second electrode area and a heat conduction area; a first metal electrode formed on the first electrode area; a first insulation layer formed between the first metal electrode and the metal substrate; a second metal electrode formed on the second electrode area; a second insulation layer formed between the second metal electrode and the metal substrate; and a solder resist layer covering the upper surface of the metal substrate; wherein the heat conduction area is exposed from the solder resist layer, and the heat conduction area is connected to the light source carrier.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 24, 2017
    Assignee: GENESIS PHOTONICS INC.
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Meng-Ting Tsai
  • Publication number: 20170062664
    Abstract: A LED package structure including a carrier substrate, a flip-chip LED and a molding compound is provided. The carrier substrate includes a main body and a patterned conductive layer embedded in the main body. The main body is composed of polymer material. The main body has a cavity, and a bottom surface of the cavity is aligned with an upper surface of the patterned conductive layer. A difference in coefficient of thermal expansion between the main body in a rubbery state and the patterned conductive layer is smaller than 30 ppm/° C. The flip-chip LED is disposed inside the cavity and electrically connected to the patterned conductive layer. The molding compound is disposed inside the cavity and encapsulates the flip-chip LED. A vertical distance between a top surface of the molding compound and the bottom surface of the cavity is smaller than or equal to a depth of the cavity.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Applicant: Genesis Photonics Inc.
    Inventors: Yu-Feng Lin, Po-Tsun Kuo, Meng-Ting Tsai
  • Patent number: 9496461
    Abstract: A LED package structure including a carrier substrate, a flip-chip LED and a molding compound is provided. The carrier substrate includes a main body and a patterned conductive layer embedded in the main body. The main body is composed of polymer material. The main body has a cavity, and a bottom surface of the cavity is aligned with an upper surface of the patterned conductive layer. A difference in coefficient of thermal expansion between the main body in a rubbery state and the patterned conductive layer is smaller than 30 ppm/° C. The flip-chip LED is disposed inside the cavity and electrically connected to the patterned conductive layer. The molding compound is disposed inside the cavity and encapsulates the flip-chip LED. A vertical distance between a top surface of the molding compound and the bottom surface of the cavity is smaller than or equal to a depth of the cavity.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: November 15, 2016
    Assignee: Genesis Photonics Inc.
    Inventors: Yu-Feng Lin, Po-Tsun Kuo, Meng-Ting Tsai
  • Publication number: 20160123565
    Abstract: A circuit board for driving a flip-chip light emitting chip is disclosed. The circuit board includes a metal substrate having a first surface and a second surface, the first surface including a first electrode area, a second electrode area and a heat conduction area; a first metal electrode formed on the first electrode area for providing a first voltage; a first insulation layer formed between the first metal electrode and the metal substrate; a second metal electrode formed on the second electrode area for providing a second voltage; a second insulation layer formed between the second metal electrode and the metal substrate; and a solder resist layer covering the first surface; wherein the heat conduction area is exposed from the solder resist layer.
    Type: Application
    Filed: October 29, 2015
    Publication date: May 5, 2016
    Inventors: Cheng-Wei Hung, Meng-Ting Tsai, Yu-Feng Lin
  • Publication number: 20160123568
    Abstract: A light emitting device includes a light source, a light source carrier and a circuit board. The circuit board is configured to provide power to the light source via the light source carrier. The circuit board includes a metal substrate having an upper surface, the upper surface including a first electrode area, a second electrode area and a heat conduction area; a first metal electrode formed on the first electrode area; a first insulation layer formed between the first metal electrode and the metal substrate; a second metal electrode formed on the second electrode area; a second insulation layer formed between the second metal electrode and the metal substrate; and a solder resist layer covering the upper surface of the metal substrate; wherein the heat conduction area is exposed from the solder resist layer, and the heat conduction area is connected to the light source carrier.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 5, 2016
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Meng-Ting Tsai