Abstract: The invention relates to a circuit structure of a flip-chip light emitting diode. It is provided for assembling of the flip-chip light emitting diode. Each flip-chip light emitting diode has at least two electrodes. The circuit structure defines a light emitting surface on a surface of a substrate, and the light emitting surface is provided with a plurality of reflective and conductive surfaces. The reflective and conductive surface is used for assembling of the electrodes of the flip-chip light emitting diode. At least one flip-chip light emitting diode is connected in series, parallel or series-parallel on the light emitting surface, wherein the total area of the reflective and conductive surface accounts for 80% to 99% of the area of the light emitting surface.

Abstract: A LED package structure including a carrier substrate, a flip-chip LED and a molding compound is provided. The carrier substrate includes a main body and a patterned conductive layer embedded in the main body. The main body is composed of polymer material. The main body has a cavity, and a bottom surface of the cavity is aligned with an upper surface of the patterned conductive layer. A difference in coefficient of thermal expansion between the main body in a rubbery state and the patterned conductive layer is smaller than 30 ppm/° C. The flip-chip LED is disposed inside the cavity and electrically connected to the patterned conductive layer. The molding compound is disposed inside the cavity and encapsulates the flip-chip LED. A vertical distance between a top surface of the molding compound and the bottom surface of the cavity is smaller than or equal to a depth of the cavity.

Abstract: A light emitting diode (LED) package structure including a carrier substrate, a LED and an electrostatic protection device is provided. The carrier substrate includes two leadframes separated from each other and a reflective member. The reflective member encapsulates the leadframes and exposes a carrier surface of each of the leadframes. The reflective member has a cavity, and a bottom surface of the cavity is aligned with the carrier surface of each of the leadframes. The LED is disposed inside the cavity and bridges the leadframes. The electrostatic protection device is disposed inside the cavity and bridges the leadframes. The LED is connected in anti-parallel to the electrostatic protection device.

Abstract: A charge pump includes a first current source, a second current source, a first switch, a second switch, a third switch, a fourth switch, a reset switch, an inverse reset switch and a capacitance. The first and third switches have first terminals coupled to the first current source. The second and fourth switches have first terminals coupled to the second current source. The first, second and reset switches have second terminals coupled to a first terminal of the inverse reset switch. The reset switch has a first terminal coupled to second terminals of the third and fourth switches. The first and second switches are respectively controlled by first and second control signals, the third and fourth switches are respectively controlled by inverse signals of the first and second control signals, and the inverse reset switch is controlled by the inverse reset signal.

Abstract: A charge pump including a first current source, a second current source, a first switch, a second switch, a third switch, a fourth switch, and a reset switch is provided. First terminals of the first and the third switch are coupled to the first current source. First terminals of the second and the fourth switch are coupled to the second current source. Second terminals of the first, the second, and the reset switch are coupled to an output terminal of the charge pump. A first terminal of the reset switch is coupled to the second terminals of the third and the fourth switch. Control terminals of the first, the second, the third, and the fourth switch respectively receive a first control signal, a second control signal, an inverted signal of the first control signal, and an inverted signal of the second control signal.

Abstract: A charge pump includes a first current source, a second current source, a first switch, a second switch, a third switch, a fourth switch, a reset switch, an inverse reset switch and a capacitance. The first and third switches have first terminals coupled to the first current source. The second and fourth switches have first terminals coupled to the second current source. The first, second and reset switches have second terminals coupled to a first terminal of the inverse reset switch. The reset switch has a first terminal coupled to second terminals of the third and fourth switches. The first and second switches are respectively controlled by first and second control signals, the third and fourth switches are respectively controlled by inverse signals of the first and second control signals, and the inverse reset switch is controlled by the inverse reset signal.

Abstract: A charge pump including a first current source, a second current source, a first switch, a second switch, a third switch, a fourth switch, and a reset switch is provided. First terminals of the first and the third switch are coupled to the first current source. First terminals of the second and the fourth switch are coupled to the second current source. Second terminals of the first, the second, and the reset switch are coupled to an output terminal of the charge pump. A first terminal of the reset switch is coupled to the second terminals of the third and the fourth switch. Control terminals of the first, the second, the third, and the fourth switch respectively receive a first control signal, a second control signal, an inverted signal of the first control signal, and an inverted signal of the second control signal.

Abstract: A frequency divider including a first frequency-dividing unit, a second frequency-dividing unit, a selecting unit, and a counting unit is provided. The first frequency-dividing unit receives an input signal and divides a frequency of the input signal for outputting a plurality of phase signals, wherein phases of the phase signals are mutually different. The selecting unit is connected to the first frequency-dividing unit for selecting one of the phase signals according to a control signal, so as to output an inner signal. The second frequency-dividing unit is coupled to the selecting unit for dividing a frequency of the inner signal to serve an output signal. The counting unit is coupled to the selecting unit for counting the inner signal and outputting a counting result as the control signal. Therefore, the output signal with about 50% duty cycle can be provided.

Abstract: A frequency synthesizer includes a multi-signal comparing phase frequency detector/converter, a loop filter, a controllable oscillator, and a frequency divider. The multi-signal comparing phase frequency detector/converter simultaneously receives N input reference frequency signals and N feedback reference frequency signals. Frequencies of the input reference frequency signals are equivalent to one another while phases thereof are different from one another. Frequencies of the feedback reference frequency signals are equivalent to one another while phases thereof are different from one another. The multi-signal comparing phase frequency detector/converter compares the input reference frequency signals and corresponding feedback reference frequency signals, and then outputs a comparison control signal according to the comparison result. The frequency synthesizer of the present invention is adapted to depress a reference spur, thus achieving an ideal output frequency signal.

Abstract: A frequency divider including a first frequency-dividing unit, a second frequency-dividing unit, a selecting unit, and a counting unit is provided. The first frequency-dividing unit receives an input signal and divides a frequency of the input signal for outputting a plurality of phase signals, wherein phases of the phase signals are mutually different. The selecting unit is connected to the first frequency-dividing unit for selecting one of the phase signals according to a control signal, so as to output an inner signal. The second frequency-dividing unit is coupled to the selecting unit for dividing a frequency of the inner signal to serve an output signal. The counting unit is coupled to the selecting unit for counting the inner signal and outputting a counting result as the control signal. Therefore, the output signal with about 50% duty cycle can be provided.