Abstract: A display controlling system utilized in a display, such as an LCD, includes a plurality of data lines and a plurality of source drivers. The source drivers receive a plurality of transfer pulse signals, each of which corresponds to one of the source drivers, and drive the corresponding data lines upon receiving the corresponding transfer pulse signal, wherein the transfer pulse signals are not all identical. The transfer pulse signal can be produced by the timing controller of the display, or the transfer pulse information required for generating the transfer pulse signals can be embedded in the source data to be delivered to the source drivers that generate the transfer pulse signals after obtaining the transfer pulse information. The transfer pulse signal lines between the timing controller and the source drivers can therefore be removed.

Abstract: A gamma voltage generator adapted in a source driver and a source driver adapted in a display panel are provided. The source driver comprises a DAC and a gamma voltage generator comprising a first and a second arithmetic circuit and a gamma voltage string. The first arithmetic circuit receives a first gamma reference voltage and at least one first tuning voltage to supply a first reference voltage. The second arithmetic circuit receives a second gamma reference voltage and at least one second tuning voltage to supply a second reference voltage. The gamma resistor string has two ends coupled to the first and the second arithmetic circuits to receive the first and the second reference voltages respectively to generate a plurality of gamma voltages. The DAC receives digital pixel data and the gamma voltages to generate a plurality of driving voltages to a pixel array of the display panel.

Abstract: A multimode source driver for driving a display device in provided, including a bus swapping circuit, connecting a first data bus to one of first and second internal buses and connecting a second data bus to the other one of the first and second internal buses according to a swapping control signal, a start pulse swapping circuit, receiving a first start pulse and a second start pulse to provide a first swap start pulse and a second swap start pulse according to the swapping control signal, a first shift register, triggered by the first swap start pulse to generate a first series of latch signals, a second shift register, triggered by the second swap start pulse to generate a second series of latch signals, a shift multiplexer, outputting a third series of latch signals by selecting the first series and second series of latch signals, a plurality of latch multiplexers, each configured to selectively transmit pixel data from the first or second internal bus according to a mode control signal, a plurality of la

Abstract: A source driver, a display device and a driving method of the source driver are disclosed. The source driver adapted to a display panel includes a plurality of driving channels, wherein the display panel includes N pixel cells on each of a plurality of scan lines. The 1st driving channel to the Nth driving channel respectively drive the N pixel cells on a first scan line of the scan lines during a first scan period and the 2nd driving channel to the (N+1)th driving channel respectively drive the N pixel cells on a second scan line of the scan lines during a second scan period. When polarity inversion is performed on the display panel, each driving channel is responsible for outputting a data driving voltage with a certain polarity to the corresponding pixel cell during different scan periods. Therefore, the power consumption of the source driver can be decreased.

Abstract: A source driver including a presetting unit and a driving unit is provided. The presetting unit receives a plurality of display data and outputs the display data or a plurality of black insertion data according to a black insertion control signal. The driving unit receives the display data or the black insertion data in accordance with the operation of the presetting unit. Furthermore, the driving unit converts the display data into a plurality of display signals, and converts the black insertion data into a plurality of black insertion signals.

Abstract: A driver circuit includes a mode control unit and a plurality of source drivers to drive a display panel including N pixel cells on each scan line. Each source driver has M driving channels, and a first subset of the driving channels and a second subset of the driving channels are respectively in a first mode and a second mode according to a preset mode sequence, wherein M?N. The 1st through Nth driving channels of a first source driver and the Mth through (M?N+1)th driving channels of a second source driver respectively drive the 1st through Nth pixel cells during a first scan period and a second scan period. The modes of the Mth through 1st driving channels of the second source driver are respectively altered to match the modes of the 1st through Mth driving channels of the first source driver by the mode control unit.

Abstract: A driver circuit includes a mode control unit and a plurality of source drivers to drive a display panel including pixel cells on each scan line. Each source driver has M driving channels, and two subsets of the driving channels are respectively in a first mode and a second mode according to a preset mode sequence. The 1st through Nth driving channels of each of first source drivers and the Mth through (M?N+1)th driving channels of each of second source drivers respectively drive the pixel cells during a first scan period and a second scan period, wherein M?N. The modes of the Mth through 1st driving channels of the second source drivers are respectively altered to match the modes of the 1st through Mth driving channels of the first source drivers by the mode control unit.

Abstract: A driver circuit includes a mode control unit and a plurality of source drivers to drive a display panel including pixel cells on each scan line. Each source driver has M driving channels, and two subsets of the driving channels are respectively in a first mode and a second mode according to a preset mode sequence. The 1st through Nth driving channels of each of first source drivers and the Mth through (M?N+1)th driving channels of each of second source drivers respectively drive the pixel cells during a first scan period and a second scan period, wherein M?N. The modes of the Mth through 1st driving channels of the second source drivers are respectively altered to match the modes of the 1st through Mth driving channels of the first source drivers by the mode control unit.

Abstract: A source driver, which has a first resistor string, a first digital-to-analog converter, and a channel buffer, is provided. The first resistor string has a plurality of resistors connected in series, wherein each of the resistors of the first resistor string provides a corresponding gamma voltage. The first digital-to-analog converter is coupled to the resistors of the first resistor string. The digital-to-analog converter selectively outputs one of gamma voltages provided by the resistors as a first output voltage according to a data code. The channel buffer is coupled to an output terminal of the first digital-to-analog converter to output a second output voltage by shifting a voltage level of the first output voltage.

Abstract: A gamma voltage generation circuit is provided. The gamma voltage generation circuit includes a plurality of resistor strings, a plurality of second resistors and a plurality of switches. Each of the resistor strings has a plurality of first resistors connected in series. Each of ends of the first resistors provides a gamma reference voltage. Each of second resistors is connected in series with the resistor strings. Each of the switches is coupled to a corresponding one of the resistor strings, selects and outputs one of the gamma reference voltages provided by the ends of the first resistors of the corresponding one of the resistor strings according to a control signal. Therefore, levels of the gamma voltages can synchronously displaced, so that the effects presented by pixels with different common voltage levels are similar or equal.

Abstract: A gamma voltage generation circuit is provided. An offset voltage generator generates a first offset voltage by dividing a voltage difference between a first input voltage and a second input voltage based on a first code. A first voltage shifting circuit of a voltage level shifter shifts down a first reference voltage by the first offset voltage to output a first level-shifted voltage. A second voltage shifting circuit of the voltage level shifter shifts down a second reference voltage by the first offset voltage to output a second level-shifted voltage. Each of resistors of a resistor string outputs one of the gamma voltages. A first end and a second end of the resistor string are respectively coupled to a first output terminal and a second output terminal of the voltage level shifter.

Abstract: A gamma voltage generation circuit is provided. The gamma voltage generation circuit includes a resistor string, a first switch, and a second switch. The resistor string includes a plurality of resistors connected in series. An output terminal of the first switch is coupled to a first end of the resistor string. An output terminal of the second switch is coupled to a second end of the resistor string. The first switch selects and outputs one of a first high reference voltage and a second high reference voltage to the first end of the resistor string according to a control signal. The second switch selects and outputs one of a first low reference voltage and a second low reference voltage to the second end of the resistor string according to the control signal.

Abstract: A source driver, which has a first resistor string, a first digital-to-analog converter, and a channel buffer, is provided. The first resistor string has a plurality of resistors connected in series, wherein each of the resistors of the first resistor string provides a corresponding gamma voltage. The first digital-to-analog converter is coupled to the resistors of the first resistor string. The digital-to-analog converter selectively outputs one of gamma voltages provided by the resistors as a first output voltage according to a data code. The channel buffer is coupled to an output terminal of the first digital-to-analog converter to output a second output voltage by shifting a voltage level of the first output voltage.

Abstract: A gamma voltage generation circuit is provided. An offset voltage generator generates a first offset voltage by dividing a voltage difference between a first input voltage and a second input voltage based on a first code. A first voltage shifting circuit of a voltage level shifter shifts down a first reference voltage by the first offset voltage to output a first level-shifted voltage. A second voltage shifting circuit of the voltage level shifter shifts down a second reference voltage by the first offset voltage to output a second level-shifted voltage. Each of resistors of a resistor string outputs one of the gamma voltages. A first end and a second end of the resistor string are respectively coupled to a first output terminal and a second output terminal of the voltage level shifter.

Abstract: A source driver includes a driver unit and a data analysis unit. The driver unit drives a display panel according to a video signal. The data analysis unit, which is coupled to the driver unit, analyzes gray level distribution of the video signal, and the data analysis unit enables or disables a charge sharing function of the driver unit according to an analysis result. As a result, the charge sharing function is enabled optionally during different charge sharing periods, and thus the power consumption in the source driver and the operation temperature of the source driver could be reduced as compared with the prior art.

Abstract: A multimode source driver for driving a display device in provided, including a bus swapping circuit, connecting a first data bus to one of first and second internal buses and connecting a second data bus to the other one of the first and second internal buses according to a swapping control signal, a start pulse swapping circuit, receiving a first start pulse and a second start pulse to provide a first swap start pulse and a second swap start pulse according to the swapping control signal, a first shift register, triggered by the first swap start pulse to generate a first series of latch signals, a second shift register, triggered by the second swap start pulse to generate a second series of latch signals, a shift multiplexer, outputting a third series of latch signals by selecting the first series and second series of latch signals, a plurality of latch multiplexers, each configured to selectively transmit pixel data from the first or second internal bus according to a mode control signal, a plurality of la

Abstract: The invention describes a system and method for driving a display device that includes an array of pixels respectively coupled with a plurality of scanning lines along a first direction and a plurality of data lines along a second direction, each of the data lines being adapted to transmit a driving signal that is amplified in a high-driving mode of operation. In one embodiment, the method comprises reading first digital data associated with a first pixel, reading second digital data associated with a second pixel, and based on the content of the first and second digital data determining whether one or more condition for generating a control signal to disable the high-driving mode of operation is satisfied.

Abstract: A source driver includes a gamma voltage generator, in which the gamma voltage generator includes a first gamma resistor string and a second gamma resistor string. The first gamma resistor string receives a first gamma reference voltage and generates a plurality of first gamma voltages. The second gamma resistor string receives a second gamma reference voltage and generates a plurality of second gamma voltages, in which the second gamma voltages have different voltage values from the first gamma voltages. The switch circuit selects the first gamma voltages or the second gamma voltages as output gamma voltages according to a timing control signal. The digital to analog converter selects one of the output gamma voltages as a driving voltage corresponding to a received digital pixel data for driving a first pixel region or a second pixel region of the sub-pixel.

Abstract: A gamma voltage generator adapted in a source driver and a source driver adapted in a display panel are provided. The source driver comprises a DAC and a gamma voltage generator comprising a first and a second arithmetic circuit and a gamma voltage string. The first arithmetic circuit receives a first gamma reference voltage and at least one first tuning voltage to supply a first reference voltage. The second arithmetic circuit receives a second gamma reference voltage and at least one second tuning voltage to supply a second reference voltage. The gamma resistor string has two ends coupled to the first and the second arithmetic circuits to receive the first and the second reference voltages respectively to generate a plurality of gamma voltages. The DAC receives digital pixel data and the gamma voltages to generate a plurality of driving voltages to a pixel array of the display panel.

Abstract: A source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a gamma resistor string, a second resistor, a plurality of first switches and a second switch. The first resistors are electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage, in which the first resistors have first ends and second ends for providing gamma voltages. The second resistor has a first end electrically connected to the gamma resistor string and a second end receiving a third gamma reference voltage. The first switches are uniformly conducted to the first ends or the second ends of the first resistors according to a timing control signal for passing the gamma voltages.