Abstract: Embodiments of a channel hole plug structure of 3D memory devices and fabricating methods thereof are disclosed. The memory device includes an alternating layer stack disposed on a substrate, an insulating layer disposed on the alternating dielectric stack, a channel hole extending vertically through the alternating dielectric stack and the insulating layer, a channel structure including a channel layer in the channel hole, and a channel hole plug in the insulating layer and above the channel structure. The channel hole plug is electrically connected with the channel layer. A projection of the channel hole plug in a lateral plane covers a projection of the channel hole in the lateral plane.

Abstract: A memory system includes a memory array comprising a plurality of memory cells. Each of the memory cells includes a first programming transistor, a second programming transistor, a first reading transistor coupled to the first programming transistor in series, and a second reading transistor coupled to the second programming transistor in series. The memory system includes an authentication circuit operatively coupled to the memory array. The authentication circuit is configured to generate a Physically Unclonable Function (PUF) signature based on respective logic states of the plurality of memory cells. The logic state of each of the plurality of memory cells is determined based on a preceding breakdown of either the corresponding first programming transistor or second programming transistor.

Abstract: A semiconductor device having an LDMOS transistor can include: a first deep well region having a first doping type; a drift region located in the first deep well region and having a second doping type; and a drain region located in the drift region and having the second doping type, where the second doping type is opposite to the first doping type, and where a doping concentration peak of the first deep well region is located below the drift region to optimize the breakdown voltage and the on-resistance of the LDMOS transistor.

Abstract: Various embodiments disclosed herein describe photonic passive delay lines that have a waveguide wound into a plurality of straight segments and bends. The photonic passive delay lines are configured to reduce losses from parasitic modes of light generated at the bends. Embodiments of the photonic passive delay lines vary the dimensions of the straight segments to provide different amounts of dephasing between a mode of input light received by the photonic passive delay line and one or more parasitic modes.

Abstract: An end cover assembly, an air cylinder, a tread sweeper and a railway vehicle.

Abstract: A SOI wafer is disclosed. The SOI wafer may be characterized by surface roughness of a top silicon layer of the SOI wafer is less than 4 ?, thickness uniformity of the top silicon layer is within ±1%, and a total number of particles on a surface of the top silicon layer of the SOI wafer, measured with setting of 37 nm of SPx detection threshold, is less than 100.

Abstract: A system for testing an assist function of electric vehicle wireless power transfer includes: a pit, a vehicle-assembly support platform, and an electromagnetic field strength measurement instrument. A ground-assembly support platform is arranged inside the pit, the vehicle-assembly support platform is arranged on an upper side of the ground-assembly support platform, and a to-be-tested member is arranged on an upper side of the ground-assembly support platform. A ground-assembly device coil is arranged on an upper surface of the ground-assembly support platform, a vehicle-assembly device coil is arranged inside the vehicle-assembly support platform, the ground-assembly device coil charges an entire vehicle, and the ground-assembly device coil further cooperates with the vehicle-assembly device coil to charge a vehicle component. A mechanical arm is arranged on ground of a test site, an interference member is arranged on a front end of the mechanical arm.

Abstract: A method (of writing to a ferroelectric field-effect transistor (FeFET) configured as a 2-bit storage device that stores two bits, wherein the FeFET includes a first source/drain (S/D) terminal, a second S/D terminal, a gate terminal and a ferroelectric layer, a second bit being at a first end of the ferroelectric layer, the first end being proximal to the first S/D terminal) includes: setting the second bit to a logical 1 value, the setting a second bit including applying a gate voltage to the gate terminal, and applying a first source/drain voltage to the second S/D terminal; and wherein the first source/drain voltage is lower than the gate voltage.

Abstract: Methods for light-induced electroplating of aluminum are disclosed herein. Exemplary methods may comprise preparing an ionic liquid comprising aluminum chloride (AlCl3) and an organic halide, placing the silicon substrate into the ionic liquid, illuminating the silicon substrate, the illumination passing through the ionic liquid, and depositing aluminum onto the silicon substrate via a light-induced electroplating process, wherein the light-induced electroplating process utilizes an applied current that does not exceed a photo-generated current generated by the illumination.

Abstract: An energy Internet system, an energy routing conversion device, and an energy control method, relating to a field of energy information. An alternating-current (AC) side energy routing conversion device of the energy Internet system includes a plurality of first route ports, and a direct-current (DC) side energy routing conversion device includes a plurality of second route ports, where each second route port is connected to a corresponding first route port by means of a corresponding DC busbar. A plurality of energy devices are connected to a DC busbar by means of corresponding first AC/DC converters or first DC converters. The AC side energy routing conversion device and the DC side energy routing conversion device collect energy information of the energy devices and adjust energy of the energy devices on a basis of energy balance constraint conditions.

Abstract: A memory device includes a programming transistor and a reading transistor of an anti-fuse memory cell. The programming transistor includes first semiconductor nanostructures vertically spaced apart from one another, each of the first semiconductor nanostructures having a first width along a first lateral direction. The reading transistor includes second semiconductor nanostructures vertically spaced apart from one another, each of the second semiconductor nanostructures having a second width different from the first width along the second direction. The memory device also includes a first and a second gate metals. The first gate metal wraps around each of the first semiconductor nanostructures with a first gate dielectric disposed therein. The second gate metal wraps around each of the second semiconductor nanostructures with a second gate dielectric disposed therein.

Abstract: Disclosed embodiments include a first playback device operating in a first mode where the first playback device plays first audio received from a second playback device via a WLAN in a groupwise fashion. After connecting to a Bluetooth audio source, the first playback device switches from operating in the first mode to operating in a second mode where the first playback device (i) ceases playing the first audio, (ii) generates second playback timing for second audio received from the Bluetooth audio source, (iii) transmits the second audio content and the second playback timing to the second playback device via Bluetooth, and (iv) plays the second audio in a groupwise fashion with the second playback device based on the second playback timing.

Abstract: A method including providing a visual cue associated with and in close physical proximity to an object, detecting a pose of the visual cue with a camera coupled to the robot arm, training by guiding the robot arm from a first position to a target position near the object based on external input, recording, by the camera, trajectory data based on the pose of the visual cue during movement of the robot arm from the first position to the target position and storing the trajectory data in memory, receiving an instruction to move the robot arm to the object, providing a sequence of robot arm trajectory instructions relative to the pose of the visual cue based on input from the camera and trajectory data to guide the robot arm to the target position.

Abstract: Provided are a method and device for receiving a measurement reference signal. The method includes: receiving control signaling; where the control signaling includes configuration information of a measurement reference signal, and the configuration information satisfies the following feature: configuring the measurement reference signal to occupy a frequency domain resource in a time domain symbol of a first set of time domain symbols in which a downlink control channel is located; and receiving the measurement reference signal according to the control signaling; wherein the first set of time domain symbols comprise M symbols, where M is a natural number; where the first set of time domain symbols in which the downlink control channel are determined by semi-static signaling; where a beam for the measurement reference signal and a beam for the downlink control is located channel are same in the time domain symbol.

Abstract: The present disclosure relates to an air conditioner pipeline and an air conditioner, thereby alleviating the problem of complicated installation of the air conditioner pipeline. The air conditioner pipeline includes a pipe body. A flow channel for a refrigerant to flow is formed by an inner side of a pipe wall of the pipe body. The pipe wall of the pipe body is provided with at least two conductive parts and insulating parts, where the conductive parts are configured to transmit power to the air conditioner, and the insulating parts are configured to realize insulation between the conductive parts. The air conditioner pipeline provided by the present disclosure can transmit refrigerants and also can transmit power, thereby saving the connection cost of an indoor unit and an outdoor unit of the air conditioner, reducing the installation complexity of the air conditioner, achieving high safety and facilitating implementation.

Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes a base substrate including a display region and a peripheral region located on at least one side of the display region, and a first gate drive circuit, the first gate drive circuit includes a first clock signal line, a second clock signal line and N shift register units that are cascaded; each shift register unit of the N shift register units includes a first output circuit; the first output circuit includes the first output transistor, the orthographic projection of the second clock signal line on the base substrate is located between an orthographic projection of the first output transistor on the base substrate and the orthographic projection of the first clock signal line on the base substrate. The display substrate can reduce load of the first clock signal line and the second clock signal line.

Abstract: A photodiode with improved response, particular in the blue light portion of the spectrum, is disclosed. An oxide window is formed adjacent a silicide junction. An etch stop layer is applied over the silicide junction, and the oxide window is then etched to form a thin film. A nitride layer is then applied. The resulting photodiode has increased transmission of blue light.

Abstract: Described are embodiments of an electrode manufacturing system that pertains to batteries and methods of preparing batteries. In some embodiments, the system includes at least one coater configured to coat a side of an electrode substrate with an electrode slurry to form a coated electrode substrate. The system can also include a multi-pass dryer configured to dry the coated electrode substrate, wherein the web path length of the coated electrode substrate in the dryer is greater than a footprint length of the dryer.

Abstract: Provided is a method of training an image recognition model, the model is configured to detect a defect region in an image of a display substrate, the display substrate includes a display area and a connection area, and the method includes: acquiring a first training sample including images of n display substrates; dividing each of the images of n display substrates into a first sub image and a second sub image, the first sub image is an image of a display area, and the second sub image is an image of a connection area; inputting the first training sample into the image recognition model, the first training sample includes the first sub image and the second sub image; and adjusting at least one feature parameter of the image recognition model to reduce a difference between an output value of the model and a training value of the first training sample.