Abstract: The present application discloses a thin-film deposition method and a semiconductor device. The thin-film deposition method in the present application includes: providing a substrate; performing thin-film deposition on the substrate by using a thin-film deposition technology to form a first deposited layer; introducing a purge gas to perform impurity purge treatment on the first deposited layer to form a purified deposited layer; and forming a thin-film layer by the purified deposited layer. In the thin-film deposition method of the present application, the thin-film deposition technology is adopted to form the deposited layer, and impurity purge treatment is performed on the deposited layer.

Abstract: A method for manufacturing a semiconductor structure and a semiconductor structure are provided. The method includes the following operations. A substrate is provided, includes a core region and a peripheral region. A preset barrier layer is formed on the substrate, and covers the core region and the peripheral region. At least a part of the preset barrier layer corresponding to the peripheral region is removed to expose a part of the substrate, and to take a reserved part of the preset barrier layer as a first barrier layer. A dielectric layer and a first conductive layer are successively formed on the first barrier layer and the substrate. A part of the dielectric layer and the first conductive layer on the first barrier layer are removed, to reserve a part of the dielectric layer and the first conductive layer on the first barrier layer closer to the peripheral region.

Abstract: The present disclosure relates to a semiconductor structure and a method for manufacturing a semiconductor structure. The method includes: providing a substrate, interlayer dielectric layer and conductive structures located in the interlayer dielectric layer being formed on the substrate; forming a first isolation dielectric layer on the interlayer dielectric layer and the conductive structures; forming trenches in the first isolation dielectric layer, the trenches exposing upper surfaces and parts of side walls of the conductive structures; and filling in the trenches to form conductive layer structure; and the distance between a bottom side wall of each trench and an exposed side wall of each conductive structure is a first preset value, and the distance between the bottom of each trench and the upper surface of each conductive structure is a second preset value.

Abstract: A manufacturing method for a semiconductor structure includes: a substrate is provided, the substrate including a first region and a second region; a dielectric layer is formed on the substrate; a first diffusion film layer having a first metal oxide layer is formed on the dielectric layer; the first diffusion film layer corresponding to the second region is removed; a second diffusion film layer is formed on the dielectric layer corresponding to the second region, the second diffusion film layer including a second metal oxide layer interfacing with the dielectric layer; and an annealing treatment is performed to diffuse a first metal element in the first metal oxide layer into the dielectric layer corresponding to the first region and diffuse a second metal element in the second metal oxide layer into the dielectric layer corresponding to the second region.

Abstract: A manufacturing method for a semiconductor structure of the disclosure includes: a first stack layer is formed; a sacrificial layer is provided on the first stack layer; thermal annealing treatment is performed on the first stack layer and the sacrificial layer so that the first stack layer is formed into a second stack layer; the sacrificial layer and a work function composite layer and a first conductive layer of the second stack layer are removed, and a substrate, a second interface layer and a high-k layer of the second stack layer are retained; and a gate layer is formed on the high-k layer.

Abstract: A method for preparing a semiconductor structure includes: providing a substrate which includes a device region and a shallow trench isolation region surrounding the device region, in which the device region is exposed from a surface of the substrate; depositing a barrier layer on the substrate, the barrier layer at least covering the device region; forming an initial oxide which is located in the device region and in contact with the barrier layer; and removing part of the initial oxide to form a device oxide.

Abstract: In a method for manufacturing a semiconductor structure, a substrate is provided; a stack layer is formed on the substrate, the stack layer including an interfacial layer, a high-k dielectric layer and a work function composite layer which are sequentially stacked; a transition layer is formed on the stack layer; and a metal gate layer is formed on the transition layer. The work function composite layer is prepared by a physical vapor deposition process.

Abstract: A method for manufacturing a buried gate and a method for manufacturing a semiconductor device are disclosed. The method for manufacturing the buried gate includes that: a trench is provided on an active region of a substrate; a gate structure is filled in a bottom of the trench, and a trench sidewall above the gate structure is exposed; an epitaxial layer is grown on the exposed trench sidewall with an epitaxial growth process, in which the epitaxial layer does not close the trench; and an isolation layer is filled in the trench.

Abstract: The present invention provides methods for the treatment of lung cancer patients, especially NSCLC with SCC or PLC using a drug against EGFR, such as an anti-EGFR antibody treatment, e.g., cetuximab. In addition, the present invention provides methods for identification or selection of lung cancer patients for the treatment with a drug against EGFR, such as an anti-EGFR antibody treatment, e.g., cetuximab based on histological determinations.

Abstract: The present disclosure provides a semiconductor device, comprising: a substrate having a first semiconductor material; a second semiconductor layer on the substrate; a third semiconductor layer on the second semiconductor layer and being a device formation region; an isolation structure on both sides of the third semiconductor layer and on the substrate; and an hollow cavity below the source and drain regions of the third semiconductor layer and between the isolation structure and the ends of the second semiconductor layer. Such a device structure of the present disclosure incorporate the respective advantages of the bulk silicon device and the SOI device, and has characteristics of lower cost, smaller leakage current, lower power consumption, fast speed, simple process and high integration level. Meanwhile, the floating body effect and the spontaneous heating effect are eliminated as compared with the SOI device.

Abstract: A semiconductor device, including: a substrate having a first semiconductor material; a second semiconductor layer on the substrate; a third semiconductor layer on the second semiconductor layer and being a device formation region; an isolation structure on both sides of the third semiconductor layer and on the substrate; and an insulating layer below the source and drain regions of the third semiconductor layer and between the isolation structure and the ends of the second semiconductor layer.

Abstract: A semiconductor device, including: a substrate having a first semiconductor material; a second semiconductor layer on the substrate; a third semiconductor layer on the second semiconductor layer and being a device formation region; an isolation structure on both sides of the third semiconductor layer and on the substrate; and an insulating layer below the source and drain regions of the third semiconductor layer and between the isolation structure and the ends of the second semiconductor layer.

Abstract: The present invention provides methods for the treatment of lung cancer patients, especially NSCLC with SCC or PLC using a drug against EGFR, such as an anti-EGFR antibody treatment, e.g., cetuximab. In addition, the present invention provides methods for identification or selection of lung cancer patients for the treatment with a drug against EGFR, such as an anti-EGFR antibody treatment, e.g., cetuximab based on histological determinations.