Patents by Inventor Meoung-Whan Cho
Meoung-Whan Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11876030Abstract: There are provided a clad material and a method for producing the same, the clad material being capable of preventing cracks from being formed and preventing the separation of layers thereof from being caused, even if it is punched by press-working (even if a high shearing force is applied thereto by thermal shock. After each of Mo—Cu layers 10, which has a metal film 10a of a metal selected from the group consisting of Co, Ti, Pd, Pt and Ni on at least one side thereof is arranged on a corresponding one of both sides of a Cu-graphite layer 12, which is obtained by sintering a graphite powder having a Cu film on the surface thereof, so as to allow the metal film 10a to contact the Cu-graphite layer 12, the layers are heated while a pressure is applied between the Cu-graphite layer 12 and the Mo—Cu layers 10.Type: GrantFiled: December 3, 2018Date of Patent: January 16, 2024Assignees: DOWA HOLDINGS CO., LTD., THE GOODSYSTEM CORPORATIONInventors: Tomotsugu Aoyama, Hiroto Narieda, Ilho Kim, Meoung whan Cho
-
Publication number: 20230183541Abstract: The present invention relates to a composite material of a metal and a non-metal and a heat dissipation part composed of the composite material. More specifically, the present invention relates to a composite material including a structure in which diamond particles which have excellent thermal conductivity are dispersed in a metal matrix, and particularly, to a highly reliable composite material capable of maintaining excellent heat dissipation properties even in a use environment such as military, aviation, space, or the like to which severe thermal cycles are applied, and to a heat dissipation part including the composite material.Type: ApplicationFiled: November 21, 2022Publication date: June 15, 2023Inventors: Meoung-whan CHO, Seog-woo LEE, Young-suk KIM
-
Publication number: 20220394882Abstract: The present invention relates to a composite material and a heat dissipation part composed of the composite material, wherein particles composed of a material having excellent thermal conductivity properties, such as diamond or silicon carbide (SiC), are composited in a metal matrix to implement excellent thermal conductivity, and at the same time, to control a thermal expansion coefficient to be in a desired range, and particularly, even if high heat is applied, the thermal conductivity is hardly degraded.Type: ApplicationFiled: April 8, 2022Publication date: December 8, 2022Inventors: Meoung-whan CHO, Seog-woo LEE, Young-suk KIM
-
Patent number: 11285701Abstract: A heat sink plate includes a first layer made of copper (Cu) or a copper (Cu) alloy, a second layer formed on the first layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), a third layer formed on the second layer and made of copper (Cu) or a copper (Cu) alloy, a fourth layer formed on the third layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), and a fifth layer formed on the fourth layer and made of copper (Cu) or a copper (Cu) alloy.Type: GrantFiled: February 25, 2020Date of Patent: March 29, 2022Assignees: THEGOODSYSTEM CORP., DOWA METALTECH CO., LTD.Inventors: Meoung-whan Cho, Il-ho Kim, Seog-woo Lee, Young-suk Kim, Hiroto Narieda, Tomotsugu Aoyama
-
Publication number: 20220068758Abstract: The objective of the present invention is to provide a radiation board, which has a low thermal expansion coefficient so as to prevent bending or damage caused by a difference in thermal deformation during bonding to a ceramic material (particularly, alumina), has high thermal conductivity in the thickness direction of the board so as to be applicable to a chip of a high power element such as a power transistor having hundreds of watts, and prevents a problem, such as a finishing defect, during a plating process performed while an electronic element is mounted. The radiation board according to the present invention comprises: a core layer having metal and nonmetal materials; a first cover layer for covering upper and lower surfaces of the core layer; and a second cover layer for covering at least some side surfaces of the core layer, wherein the first cover layer and the second cover layer are made of a material that can be plated on externally exposed surfaces thereof.Type: ApplicationFiled: January 13, 2020Publication date: March 3, 2022Inventors: Meoung-whan CHO, Seog-woo LEE, Young-suk KIM
-
Publication number: 20210175147Abstract: There are provided a clad material and a method for producing the same, the clad material being capable of preventing cracks from being formed and preventing the separation of layers thereof from being caused, even if it is punched by press-working (even if a high shearing force is applied thereto by thermal shock. After each of Mo—Cu layers 10, which has a metal film 10a of a metal selected from the group consisting of Co, Ti, Pd, Pt and Ni on at least one side thereof is arranged on a corresponding one of both sides of a Cu-graphite layer 12, which is obtained by sintering a graphite powder having a Cu film on the surface thereof, so as to allow the metal film 10a to contact the Cu-graphite layer 12, the layers are heated while a pressure is applied between the Cu-graphite layer 12 and the Mo—Cu layers 10.Type: ApplicationFiled: December 3, 2018Publication date: June 10, 2021Applicants: Dowa Holdings Co., Ltd., The Goodsystem CorporationInventors: Tomotsugu Aoyama, Hiroto Narieda, Ilho Kim, Meoung whan Cho
-
Publication number: 20200290316Abstract: A heat sink plate includes a first layer made of copper (Cu) or a copper (Cu) alloy, a second layer formed on the first layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), a third layer formed on the second layer and made of copper (Cu) or a copper (Cu) alloy, a fourth layer formed on the third layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), and a fifth layer formed on the fourth layer and made of copper (Cu) or a copper (Cu) alloy.Type: ApplicationFiled: February 25, 2020Publication date: September 17, 2020Inventors: Meoung-whan CHO, Il-ho KIM, Seog-woo LEE, Young-suk KIM, Hiroto NARIEDA, Tomotsugu AOYAMA
-
Patent number: 10777484Abstract: A heat sink plate having a structure in which two or more kinds of materials are laminated, includes: a core layer in the thickness direction of the heat sink plate; and cover layers covering a top surface and a bottom surface of the core layer; wherein the cover layers comprise a material containing copper, wherein the core layer is formed of a matrix having a first thermal expansion coefficient and a plurality of layers extending in parallel along the thickness direction of the core layer in a lattice form in the matrix, wherein the plurality of layers are made of an alloy having a second thermal expansion coefficient.Type: GrantFiled: October 11, 2018Date of Patent: September 15, 2020Assignee: THE GOODSYSTEM CORP.Inventors: Il-ho Kim, Meoung-whan Cho, Young-suk Kim
-
Publication number: 20190115279Abstract: A heat sink plate having a structure in which two or more kinds of materials are laminated, includes: a core layer in the thickness direction of the heat sink plate; and cover layers covering a top surface and a bottom surface of the core layer; wherein the cover layers comprise a material containing copper, wherein the core layer is formed of a matrix having a first thermal expansion coefficient and a plurality of layers extending in parallel along the thickness direction of the core layer in a lattice form in the matrix, wherein the plurality of layers are made of an alloy having a second thermal expansion coefficient.Type: ApplicationFiled: October 11, 2018Publication date: April 18, 2019Applicant: THE GOODSYSTEM CORP.Inventors: Il-ho KIM, Meoung-whan CHO, Young-suk KIM
-
Publication number: 20180328677Abstract: A heat-dissipating plate comprises a core layer; and two cover layers formed by being laminated on the top and bottom face of the core layer, wherein, the core layer is composed of a composite material in which a carbon phase is composited in a Cu matrix, the cover layer is composed of a Mo—Cu alloy, and the thermal conductivity in the thickness direction of the heat-dissipating plate is at least 300 W/mK, and the thermal expansion coefficient of the heat-dissipating plate in a direction perpendicular to the thickness direction is at most 9×10-6/K.Type: ApplicationFiled: September 6, 2016Publication date: November 15, 2018Applicant: THE GOODSYSTEM CORP.Inventors: Il-ho KIM, Meoung-whan CHO, Young-suk KIM
-
Patent number: 9537053Abstract: Provided is a high quality III nitride semiconductor device in which, not only X-shaped cracks extending from the vicinity of the corners of semiconductor structures to the center portion thereof, but also crack spots at the center portion can be prevented from being formed and can provide a method of efficiently manufacturing the III nitride semiconductor device. The III nitride semiconductor device of the present invention includes a support and two semiconductor structures having a nearly quadrangular transverse cross-sectional shape that are provided on the support. The two semiconductor structures are situated such that one side surface of one of the two semiconductor structures is placed to face one side surface of the other of them. The support covers the other three side surfaces and of the four sides of the semiconductor structures.Type: GrantFiled: September 28, 2012Date of Patent: January 3, 2017Assignees: BBSA LIMITED, DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
-
Vertically structured group III nitride semiconductor LED chip and method for manufacturing the same
Patent number: 9502603Abstract: A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.Type: GrantFiled: May 12, 2011Date of Patent: November 22, 2016Assignees: WAVESQUARE INC., DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Yoshitaka Kadowaki -
Patent number: 9184338Abstract: The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.Type: GrantFiled: September 28, 2011Date of Patent: November 10, 2015Assignees: BBSA LIMITED, DOW ELECTRONICS MATERIALS CO., LTD.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
-
Publication number: 20150263234Abstract: Provided is a high quality III nitride semiconductor device in which, not only X-shaped cracks extending from the vicinity of the corners of semiconductor structures to the center portion thereof, but also crack spots at the center portion can be prevented from being formed and can provide a method of efficiently manufacturing the III nitride semiconductor device. The III nitride semiconductor device of the present invention includes a support and two semiconductor structures having a nearly quadrangular transverse cross-sectional shape that are provided on the support. The two semiconductor structures are situated such that one side surface of one of the two semiconductor structures is placed to face one side surface of the other of them. The support covers the other three side surfaces and of the four sides of the semiconductor structures.Type: ApplicationFiled: September 28, 2012Publication date: September 17, 2015Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
-
Publication number: 20150187887Abstract: Provided is a III nitride semiconductor device higher heat dissipation performance, and a method of manufacturing a III nitride semiconductor device which makes it possible to fabricate such a III nitride semiconductor device at higher yield. In a method of a III nitride semiconductor device, a semiconductor structure obtained by sequentially stacking an n-layer, an active layer, and a p-layer is formed on a growth substrate; a support body including a first support electrically connected to an n-layer to serve as an n-side electrode, a second support electrically connected to a p-layer to serve as a p-side electrode, and structures made of an insulator for insulation between first and second supports is formed on the p-layer side of the semiconductor structure; and the growth substrate is separated using a lift-off process. The first support and the second support are grown by plating.Type: ApplicationFiled: July 4, 2012Publication date: July 2, 2015Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., BBSA LIMITEDInventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Hoe Young Yang, Jin Hee Kim, Ho Kyun Rho, Se Young Moon, Ryuichi Toba, Yoshitaka Kadowaki
-
Vertically structured group III nitride semiconductor LED chip and method for manufacturing the same
Patent number: 9012935Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.Type: GrantFiled: September 4, 2013Date of Patent: April 21, 2015Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Tatsunori Toyota, Yoshitaka Kadowaki -
Patent number: 8963290Abstract: The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step).Type: GrantFiled: December 28, 2010Date of Patent: February 24, 2015Assignees: Dowa Electronics Materials Co., Ltd., Wavesquare Inc.Inventors: Ryuichi Toba, Yoshitaka Kadowaki, Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang
-
Vertically structured group III nitride semiconductor LED chip and method for manufacturing the same
Patent number: 8962362Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.Type: GrantFiled: November 5, 2009Date of Patent: February 24, 2015Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Tatsunori Toyota, Yoshitaka Kadowaki -
VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME
Publication number: 20140319557Abstract: A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.Type: ApplicationFiled: May 12, 2011Publication date: October 30, 2014Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., WAVESQUARE INC.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Yoshitaka Kadowaki -
Patent number: D853977Type: GrantFiled: September 22, 2017Date of Patent: July 16, 2019Assignee: THE GOODSYSTEM CO., LTD.Inventors: Il-ho Kim, Meoung-whan Cho, Young-suk Kim