Abstract: Provided is a method of forming a semiconductor package. In the method, a first package including a first chip on a first substrate is formed, a second package including a second chip on a second substrate is formed, a molding cap provided with a via hole and a recess structure configured to receive the first chip is formed, and the second package is provided on the first package with the molding cap being therebetween such that the recess receives the first chip. The via hole and the recess structure are simultaneously formed.

Abstract: A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.

Abstract: Provided are a printed circuit board (PCB) and a semiconductor package including the same. The PCB includes a core layer having a stacked structure including at least a first layer made of a first material that has a first coefficient of thermal expansion (CTE) and a second layer made of a second material that has a second CTE different from the first CTE, an upper wiring layer disposed on a first surface of the core layer, and a lower wiring layer disposed on a second surface of the core layer opposite the first surface.

Abstract: The present invention provides a novel benzamide derivative or a pharmaceutically acceptable salt thereof, a method for preparing the same, and a 5-HT4 receptor agonist containing the same as an active ingredient. Benzamide derivatives of the present invention have a superior affinity for 5-HT4 receptors, a capability to reduce a gastric emptying time and a low toxicity, and consequently are therapeutically effective for the treatment of a variety of diseases associated with 5-HT4 receptors.

Abstract: Provided is a method of forming a package-on-package. An encapsulation is formed to cover a wafer using a wafer level molding process. The wafer includes a plurality of semiconductor chips and a plurality of through silicon vias (TSVs) passing through the semiconductor chips. The encapsulant may have openings aligned with the TSVs. The encapsulant and the semiconductor chips are divided to form a plurality of semiconductor packages. Another semiconductor package is stacked on one selected from the semiconductor packages. The other semiconductor package is electrically connected to the TSVs.

Abstract: A semiconductor package may include a substrate having first and second surfaces, the second surface including a recessed portion, a first semiconductor chip mounted on the first surface, a first ball land outside the recessed portion, a connection pad inside the recessed portion, a second chip in the recessed portion, the second semiconductor chip including a through via electrically connected to the connection pad, and a second ball land electrically connected to the through via. A semiconductor package may include a substrate having first and second surfaces, the second surface including a recessed portion, a first semiconductor chip mounted on the first surface, a first ball land outside the recessed portion, a connection pad inside the recessed portion, a second semiconductor chip in the recessed portion, the second chip including a through via electrically connected to the connection pad, and a second ball land electrically connected to the through via.

Abstract: Provided is a method of forming a package-on-package. An encapsulation is formed to cover a wafer using a wafer level molding process. The wafer includes a plurality of semiconductor chips and a plurality of through silicon vias (TSVs) passing through the semiconductor chips. The encapsulant may have openings aligned with the TSVs. The encapsulant and the semiconductor chips are divided to form a plurality of semiconductor packages. Another semiconductor package is stacked on one selected from the semiconductor packages. The other semiconductor package is electrically connected to the TSVs.

Abstract: A package on package is provided herein, the package on package including a first semiconductor package including a first substrate, a first semiconductor chip stacked on the first substrate, a plurality of first connection members on an upper surface of the first substrate and in a first molding material, and a plurality of via holes which respectively expose the plurality of first connection members through the first molding material; a second semiconductor package including a second substrate, a second semiconductor chip stacked on the second substrate, and a plurality of second connection members on a lower surface of the second substrate; and a plurality of connection portions including a plurality of cores and a plurality of conductive fusion layers surrounding the plurality of cores, wherein the plurality of conductive fusion layers contact the upper surface of the first substrate and the lower surface of the second substrate.

Abstract: Provided are a printed circuit board (PCB) and a semiconductor package including the same. The PCB includes a core layer having a stacked structure including at least a first layer made of a first material that has a first coefficient of thermal expansion (CTE) and a second layer made of a second material that has a second CTE different from the first CTE, an upper wiring layer disposed on a first surface of the core layer, and a lower wiring layer disposed on a second surface of the core layer opposite the first surface.

Abstract: A stack type semiconductor package and a method of fabricating the stack type semiconductor package. The stack type semiconductor package includes: a lower semiconductor package including a circuit board, a semiconductor chip which is disposed on an upper surface of the circuit board, via-pads which are arrayed on the upper surface of the circuit board around the semiconductor chip, and an encapsulation layer which encapsulates the upper surface of the circuit board and has via-holes through which the via-pads are exposed; and an upper semiconductor package which is stacked on the encapsulation layer, is electrically connected to the lower semiconductor package, and comprises internal connection terminals which are formed on a lower surface of the upper semiconductor package.

Abstract: A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.

Abstract: A multi-chip package may include a first semiconductor package, a second semiconductor package and an interposer chip. The second semiconductor package may be arranged over the first semiconductor package. The interposer chip may be interposed between the first semiconductor package and the second semiconductor package. The interposer chip may have a receiving groove configured to receive the first semiconductor package. Thus, electrical connection reliability between the first semiconductor package and the second semiconductor package may be improved under a condition that the connecting terminals may have small sizes.

Abstract: Provided is a method of forming a package-on-package. An encapsulation is formed to cover a wafer using a wafer level molding process. The wafer includes a plurality of semiconductor chips and a plurality of through silicon vias (TSVs) passing through the semiconductor chips. The encapsulant may have openings aligned with the TSVs. The encapsulant and the semiconductor chips are divided to form a plurality of semiconductor packages. Another semiconductor package is stacked on one selected from the semiconductor packages. The other semiconductor package is electrically connected to the TSVs.

Abstract: Semiconductor package includes a first semiconductor package including a first printed circuit board, and a first semiconductor device mounted on the first printed circuit board, and a second semiconductor package stacked on the first semiconductor package, and including a second printed circuit board and a second semiconductor device mounted on the second printed circuit board. The semiconductor package includes at least one first through electrode electrically connecting the second semiconductor package to the first printed circuit board through the first semiconductor device.

Abstract: Provided are a semiconductor package and a method of forming the same. The semiconductor package includes a stress reliever disposed on a part (more specifically, a weak part) of a semiconductor chip. The stress reliever relieves thermal and/or physical stresses caused by a molding layer. As a result, the semiconductor chip does not suffer from the thermal and/or physical stresses.

Abstract: A semiconductor package may include a substrate having first and second surfaces, the second surface including a recessed portion, a first semiconductor chip mounted on the first surface, a first ball land outside the recessed portion, a connection pad inside the recessed portion, a second chip in the recessed portion, the second semiconductor chip including a through via electrically connected to the connection pad, and a second ball land electrically connected to the through via. A semiconductor package may include a substrate having first and second surfaces, the second surface including a recessed portion, a first semiconductor chip mounted on the first surface, a first ball land outside the recessed portion, a connection pad inside the recessed portion, a second semiconductor chip in the recessed portion, the second chip including a through via electrically connected to the connection pad, and a second ball land electrically connected to the through via.

Abstract: The present invention relates to a composition for stimulating bone growth containing the extract of crude drug complex as an active ingredient. The extract of crude drug complex comprising Dipsaci radix, Astragalus membranaceus and Acanthopanax senticosus of the present invention stimulates bone growth, so that it can be effectively used for the composition and health food for stimulating bone growth.

Abstract: Provided is a method of forming a semiconductor package. In the method, a first package including a first chip on a first substrate is formed, a second package including a second chip on a second substrate is formed, a moulding cap provided with a via hole and a recess structure configured to receive the first chip is formed, and the second package is provided on the first package with the moulding cap being therebetween such that the recess receives the first chip. The via hole and the recess structure are simultaneously foamed.

Abstract: A method, a system and a recorded medium for sorting and searching files are disclosed. A method of sorting and searching files have the steps of (a) outputting an annotation interface for an original file selected by a user, (b) receiving annotation details inputted through the annotation interface, (c) generating an annotation file in accordance with the annotation details, and (d) storing the annotation file. With the present invention, the efficient sorting and searching of files can be easily performed by using all kinds of fields stored in a user terminal.

Abstract: The present invention relates to the pharmaceutical composition and health care food comprising oleic acid having neuroprotective activity. The oleic acid of the present invention has potent neuroprotective effect and recovery effect on neurological behavior. Therefore, it is useful as the therapeutics for the prevention or treatment of degenerative brain diseases in human or mammal.