Abstract: Photovoltaic devices are produced using a minimally modified standard process flow by forming lateral P-I-N light-sensitive diodes on silicon islands that are isolated laterally by trenches performed by RIE, and from an underlying support substrate by porous silicon regions. P+ and N+ doped regions are formed in a P? epitaxial layer, trenches are etched through the epitaxial layer into a P+ substrate, a protective layer (e.g., SiN) is formed on the trench walls, and then porous silicon is formed (e.g., using HF solution) in the trenches that grows laterally through the P+ substrate and merges under the island. The method is either utilized to form low-cost embedded photovoltaic arrays on CMOS IC devices, or the devices are separated from the P+ substrate by etching through the porous silicon to produce low-cost, high voltage solar arrays for solar energy sources, e.g., solar concentrators.

Abstract: A photovoltaic device includes lateral P-I-N light-sensitive diodes disposed on a silicon island formed by a P? epitaxial layer and surrounded by trenches that provide lateral isolation, where the island is separated from the substrate by a porous silicon region that is grown under the island and isolates the lower portions of the photovoltaic device from the highly doped substrate. The trenches extend through the P? epitaxial material into the P+ substrate to facilitate self-limiting porous silicon formation at the bottom of the island, and also to suppress electron-hole recombination. A protective layer (e.g., SiN) is formed on the trench walls to further restrict porous silicon formation to the bottom of the island. Black silicon on the trench walls enhances light capture. The photovoltaic devices form low-cost embedded photovoltaic arrays on CMOS IC devices, or are separated to produce low-cost, HV solar arrays for solar energy sources, e.g. for solar concentrators.

Abstract: Photovoltaic devices are produced using a minimally modified standard process flow by forming lateral P-I-N light-sensitive diodes on silicon islands that are isolated laterally by trenches performed by RIE, and from an underlying support substrate by porous silicon regions. P+ and N+ doped regions are formed in a P? epitaxial layer, trenches are etched through the epitaxial layer into a P+ substrate, a protective layer (e.g., SiN) is formed on the trench walls, and then porous silicon is formed (e.g., using HF solution) in the trenches that grows laterally through the P+ substrate and merges under the island. The method is either utilized to form low-cost embedded photovoltaic arrays on CMOS IC devices, or the devices are separated from the P+ substrate by etching through the porous silicon to produce low-cost, high voltage solar arrays for solar energy sources, e.g., solar concentrators.

Abstract: A photovoltaic device includes lateral P-I-N light-sensitive diodes disposed on a silicon island formed by a P? epitaxial layer and surrounded by trenches that provide lateral isolation, where the island is separated from the substrate by a porous silicon region that is grown under the island and isolates the lower portions of the photovoltaic device from the highly doped substrate. The trenches extend through the P? epitaxial material into the P+ substrate to facilitate self-limiting porous silicon formation at the bottom of the island, and also to suppress electron-hole recombination. A protective layer (e.g., SiN) is formed on the trench walls to further restrict porous silicon formation to the bottom of the island. Black silicon on the trench walls enhances light capture. The photovoltaic devices form low-cost embedded photovoltaic arrays on CMOS IC devices, or are separated to produce low-cost, HV solar arrays for solar energy sources, e.g. for solar concentrators.

Abstract: A method for forming a micro- or nano-pattern of a material on a substrate is presented. The method utilizes a buffer layer assisted laser patterning (BLALP). A layered structure is formed on the substrate, this layered structure being in the form of spaced-apart regions of the substrate defined by the pattern to be formed, each region including a weakly physisorbed buffer layer and a layer of the material to be patterned on top of the buffer layer. A thermal process is then applied to the layered structure to remove the remaining buffer layer in said regions, and thus form a stable pattern of said material on the substrate resulting from the buffer layer assisted laser patterning. The method may utilize either positive or negative lithography. The patterning may be implemented using irradiation with a single uniform laser pulse via a standard mask used for optical lithography.

Abstract: A method for forming a micro- or nano-pattern of a material on a substrate is presented. The method utilizes a buffer layer assisted laser patterning (BLALP). A layered structure is formed on the substrate, this layered structure being in the form of spaced-apart regions of the substrate defined by the pattern to be formed, each region including a weakly physisorbed buffer layer and a layer of the material to be patterned on top of the buffer layer. A thermal process is then applied to the layered structure to remove the remaining buffer layer in said regions, and thus form a stable pattern of said material on the substrate resulting from the buffer layer assisted laser patterning. The method may utilize either positive or negative lithography. The patterning may be implemented using irradiation with a single uniform laser pulse via a standard mask used for optical lithography.