Patents by Inventor Michael A. VanBuskirk

Michael A. VanBuskirk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9318373
    Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: April 19, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: David M Rogers, Mimi X Qian, Kwadwo A Appiah, Mark Randolph, Michael A VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi He, Wei Zheng
  • Publication number: 20130237022
    Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).
    Type: Application
    Filed: April 19, 2013
    Publication date: September 12, 2013
    Applicant: SPANSION LLC
    Inventors: David M Rogers, Mimi X Qian, Kwadwo A Appiah, Mark Randolph, Michael A VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi HE, Wei Zheng
  • Patent number: 8445966
    Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: May 21, 2013
    Assignee: Spansion LLC
    Inventors: David M. Rogers, Mimi X. Qian, Kwadwo A. Appiah, Mark Randolph, Michael A. VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi He, Wei Zheng
  • Publication number: 20120092924
    Abstract: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 19, 2012
    Inventors: Michael A. VanBuskirk, Colin S. Bill, Zhida Lan, Tzu-Ning Fang
  • Patent number: 8098521
    Abstract: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: January 17, 2012
    Assignee: Spansion LLC
    Inventors: Michael A. VanBuskirk, Colin S. Bill, Zhida Lan, Tzu-Ning Fang
  • Patent number: 8003436
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: August 23, 2011
    Assignee: Spansion LLC
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 7791947
    Abstract: The present disclosure adjusts the voltage threshold values of select gates of NAND strings. The select gates of the NAND string can be read, erased, and programmed.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: September 7, 2010
    Assignee: Spansion LLC
    Inventors: Michael A. VanBuskirk, Colin S. Bill, Takao Akaogi
  • Publication number: 20090180330
    Abstract: The present disclosure adjusts the voltage threshold values of select gates of NAND strings. The select gates of the NAND string can be read, erased, and programmed.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 16, 2009
    Applicant: SPAINSION LLC
    Inventors: Michael A. VanBuskirk, Colin S. Bill, Takao Akaogi
  • Publication number: 20090081824
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Application
    Filed: December 3, 2008
    Publication date: March 26, 2009
    Applicant: SPANSION LLC
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 7499309
    Abstract: A metal sulfide based non-volatile memory device is provided herein. The device is comprised of a substrate, a backplane, a planar memory media including a dense array of metal sulfide based memory cells, and a MEMS probe based actuator. The cells of the memory device are operative to be of two or more states corresponding to various levels of impedance. The MEMS actuator is operable to position micro/nano probes over the appropriate cells to enable reading, writing, and erasing the memory cells by applying a bias voltage.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: March 3, 2009
    Assignee: Spansion LLC
    Inventors: Colin Bill, Michael A. VanBuskirk, Tzu-Ning Fang
  • Patent number: 7465956
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: December 16, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 7443732
    Abstract: A method is provided for programming a nonvolatile memory array including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes receiving a programming window containing a predetermined number of bits that are to be programmed in the array and determining which of the predetermined number of bits are to be programmed in the memory array. The predetermined number of bits are simultaneously programmed to corresponding memory cells in the array. A programming state of the predetermined number of bits in the array is simultaneously verified.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: October 28, 2008
    Assignee: Spansion LLC
    Inventors: Tiao-Hua Kuo, Nancy Leong, Nian Yang, Guowei Wang, Aaron Lee, Sachit Chandra, Michael A. VanBuskirk, Johnny Chen, Darlene Hamilton, Binh Quang Le
  • Publication number: 20080151590
    Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventors: David M. Rogers, Mimi X. Qian, Kwadwo A. Appiah, Mark Randolph, Michael A. VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi He, Wei Zheng
  • Patent number: 7199394
    Abstract: Systems and methodologies are provided for of enabling a polymer memory cell to exhibit variable retention times for stored data therein. Such setting of retention time can depend upon a programming mode and/or type of material employed in the polymer memory cell. Short retention times can be obtained by programming the polymer memory cell via a low current or a low electrical field. Similarly, long retention times can be obtained by employing a high current or electrical field to program the polymer memory cell.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: April 3, 2007
    Assignee: Spansion LLC
    Inventors: Aaron Mandell, Michael A VanBuskirk, Stuart Spitzer, Juri H Krieger
  • Patent number: 7035141
    Abstract: The present memory structure includes thereof a first conductor, a second conductor, a resistive memory cell connected to the second conductor, a first diode connected to the resistive memory cell and the first conductor, and oriented in the forward direction from the resistive memory cell to the first conductor, and a second diode connected to the resistive memory cell and the first conductor, in parallel with the first diode, and oriented in the reverse direction from the resistive memory cell to the first conductor. The first and second diodes have different threshold voltages.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 25, 2006
    Inventors: Nicholas H. Tripsas, Colin S. Bill, Michael A. VanBuskirk, Matthew Buynoski, Tzu-Ning Fang, Wei Daisy Cai, Suzette Pangrle, Steven Avanzino
  • Patent number: 6979837
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: December 27, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 6960783
    Abstract: An organic memory cell made of two electrodes with a selectively conductive media between the two electrodes is disclosed. The selectively conductive media contains an organic layer and passive layer. The selectively conductive media is programmed by applying bias voltages that program a desired impedance state for a memory cell. The desired impedance state represents one or more bits of information and the memory cell does not require constant power or refresh cycles to maintain the desired impedance state. Furthermore, the selectively conductive media is read by applying a current and reading the impedance of the media in order to determine the impedance state of the memory cell. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: November 1, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Zhida Lan, Colin Bill, Michael A. VanBuskirk
  • Patent number: 6943370
    Abstract: The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 13, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael A. VanBuskirk, Colin Bill, Tzu-Ning Fang, Zhida Lan
  • Patent number: 6870183
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: March 22, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 6847047
    Abstract: The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: January 25, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael A. VanBuskirk, Colin Bill, Tzu-Ning Fang, Zhida Lan