Patents by Inventor Michael B. Lafleur

Michael B. Lafleur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11751338
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: September 5, 2023
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 11304297
    Abstract: Encapsulated electronic modules having complex contact structures may be formed by encapsulating panels containing a substrate comprising pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within terminal holes and other holes drilled in the panel within the boundaries of the cut lines. Slots may be cut in the panel along the cut lines. The interior of the holes, as well as surfaces within the slots and on the surfaces of the panel may be metallized, e.g. by a series of processes including plating. Terminals may be inserted into the terminal holes and connected to conductive features or plating within the holes. A conductive element may be provided on the substrate to connect to a terminal. Alternatively solder may be dispensed into the holes for surface mounting.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: April 12, 2022
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: 10791645
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: September 29, 2020
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 10785871
    Abstract: Encapsulated electronic modules having complex contact structures may be formed by encapsulating panels containing a substrate comprising pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within terminal holes and other holes drilled in the panel within the boundaries of the cut lines. Slots may be cut in the panel along the cut lines. The interior of the holes, as well as surfaces within the slots and on the surfaces of the panel may be metallized, e.g. by a series of processes including plating. Terminals may be inserted into the terminal holes and connected to conductive features or plating within the holes. A conductive element may be provided on the substrate to connect to a terminal. Alternatively solder may be dispensed into the holes for surface mounting.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 22, 2020
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: 10757816
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: August 25, 2020
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Publication number: 20200253060
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area.
    Type: Application
    Filed: April 22, 2020
    Publication date: August 6, 2020
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D`Amico
  • Patent number: 10701828
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: June 30, 2020
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 9516761
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: December 6, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Publication number: 20160302312
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area.
    Type: Application
    Filed: June 17, 2016
    Publication date: October 13, 2016
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 9439297
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: September 6, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 9402319
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features. Wide cuts may be made in the molds after encapsulation reducing thermal stresses. Blank mold panels may be machined to provide some or all of the above features in an on-demand manufacturing system. Connection adapters may be provided to use the modules in vertical or horizontal mounting positions in connector, through-hole, surface-mount solder variations.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: July 26, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: D775092
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: December 27, 2016
    Assignee: VLT, INC.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D775093
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: December 27, 2016
    Assignee: VLT, INC.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D798249
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: September 26, 2017
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D813159
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: March 20, 2018
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D834548
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: November 27, 2018
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D837734
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: January 8, 2019
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D877708
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 10, 2020
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D911280
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: February 23, 2021
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D1016748
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: March 5, 2024
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur