Abstract: A semiconductor integrated circuit including a circuit for adaptive power supply regulation and designed using a process that increases operating speed used for characterizing circuit operation at a slow corner. In some embodiments a slow corner voltage is set to a higher than expected level for timing analysis performed by automated design tools.

Abstract: A digitally switched impedance has improved linearity by minimizing the amount of impedance error introduced by switches used to switch the impedance elements comprising the digitally switched impedance. Improved settling time of the digitally switched impedance is achieved by reducing the amount of switch capacitance connected to the output of the digitally switched impedance. The digitally switched impedance may be fabricated on an integrated circuit die and the switches may be fabricated with complementary metal oxide semiconductor (CMOS) transistors. The number of impedances needed for a desired number of impedance step changes is reduced by using two major impedance ranks and one minor impedance rank, or two minor impedance ranks and one major impedance rank connected in series.

Abstract: A digitally switched impedance has improved linearity by minimizing the amount of impedance error introduced by switches used to switch the impedance elements comprising the digitally switched impedance. Improved settling time of the digitally switched impedance is achieved by reducing the amount of switch capacitance connected to the output of the digitally switched impedance. The digitally switched impedance may be fabricated on an integrated circuit die and the switches may be fabricated with complementary metal oxide semiconductor (CMOS) transistors. The number of impedances needed for a desired number of impedance step changes is reduced by using two major impedance ranks and one minor impedance rank, or two minor impedance ranks and one major impedance rank connected in series.

Abstract: A digitally switched potentiometer has improved linearity by minimizing the amount of resistive error introduced by switches used to switch the resistive elements comprising the potentiometer. Improved settling time of the potentiometer is achieved by reducing the amount of switch capacitance connected to the output of the potentiometer. The digitally switched potentiometer may be fabricated on an integrated circuit die and the switches may be fabricated with complementary metal oxide semiconductor (CMOS) transistors. The number of resistors needed for a desired number of resistive step changes is reduced by using two major resistor ranks and one minor resistor rank, or two minor resistor ranks and one major resistor rank connected in series.