Patents by Inventor Michael Chandler
Michael Chandler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250233771Abstract: A system for transmission of primary and secondary data, the system comprising: a bus; a parent node coupled to the bus; and a plurality of child nodes, each coupled to the bus, wherein: the parent node is configured to periodically transmit a time domain multiplexing (TDM) cycle beacon to the bus, wherein the TDM cycle beacon signals a start of a primary data transmission interval, and wherein the primary data transmission interval is a period reserved for transmission of primary data by the parent node and the plurality of child nodes; the parent node and each of the plurality of child nodes are operable to, responsive to the TDM cycle beacon, transmit primary data for a current TDM beacon period associated with the TDM cycle beacon to the bus during the primary data transmission interval; and the parent node and the plurality of child nodes are operable to transmit secondary data to the bus during a secondary data transmission interval between an end of the primary transmission interval and transmission byType: ApplicationFiled: January 8, 2025Publication date: July 17, 2025Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Michael CHANDLER-PAGE, Jack FULLER, Amr ELSLEHDAR
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Patent number: 12349083Abstract: Implementations disclosed describe techniques and systems to facilitate efficient operations of wireless networks organized in a topology of communicating nodes. Techniques include cascade synchronization of various nodes of the network by generating and maintaining a common time using times associated with ordered communications between nodes. The common time maintained by the network allows performance of synchronous action for precise industrial, medical, and testing applications. The described techniques and systems further include management of communication windows between different nodes in a way that facilitates fast and efficient propagation of data collected by the network from multiple source nodes to one or more destination nodes.Type: GrantFiled: December 30, 2021Date of Patent: July 1, 2025Assignee: Cypress Semiconductor CorporationInventors: Manamohan D. Mysore, Ash Kapur, Michael Chandler, Victor Zhodzishsky
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Patent number: 12324997Abstract: An apparatus for filtering raw sea water and methods for using the same are provided. The apparatus includes a longitudinal beam member having a first end and a second end. A first header is located about the first end of the beam member and a second header is located about the second end of the beam member. A removable mesh screen can be disposed around the beam member and between the first and second headers, defining an inner cavity between an inner surface of the removable mesh screen and outer surface of the beam member. A handle can be disposed on the first header. The removable mesh screen includes at least one latching member that is configured to secure the mesh screen around the beam member when latched and to release the removable mesh screen from around the beam member when unlatched.Type: GrantFiled: September 27, 2024Date of Patent: June 10, 2025Assignee: EZ CLEAN MARINE STRAINERS LLCInventors: Chase Michael Chandler, Peter David Gadsby
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Publication number: 20250172963Abstract: Circuitry for aligning a phase of an output signal with a phase of an input clock signal, the circuitry being operable in one of a plurality of phase alignment modes, wherein the plurality of phase alignment modes comprises two or more of: a single step alignment mode; a multiple step alignment mode; and a random or pseudo-random step alignment mode.Type: ApplicationFiled: October 5, 2024Publication date: May 29, 2025Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Luis GOMEZ DURAN, Michael CHANDLER-PAGE, Erich P. ZWYSSIG
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Patent number: 12039090Abstract: An integrated circuit comprises first and second interfaces, an internal addressable space comprising a plurality of address ranges, and a control unit. Each of the first and second interfaces is coupled to the internal addressable space via the control unit. The control unit is configurable in a first state in which the control unit is configured to allow or deny the second interface access to a subset of the plurality of address ranges of the internal addressable space.Type: GrantFiled: August 4, 2021Date of Patent: July 16, 2024Assignee: Cirrus Logic Inc.Inventors: Michael Chandler-Page, Pradeep Saminathan, Jon Eklund, Neil Whyte, José Arnaldo Bianco Filho, Abhinav Sharma
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Publication number: 20240154592Abstract: An integrated circuit (IC), comprising: a first input pin for receiving a first input signal; a first converter configured to convert the first input signal to a first output signal; a first gain stage configured to apply a first gain to the first output signal; gain update circuitry configured to: output a first external gain control signal to a first output pin of the IC; and subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage, wherein the gain update circuitry comprises level detection circuitry configured to determine a signal level of the first input signal or the first output signal.Type: ApplicationFiled: November 9, 2023Publication date: May 9, 2024Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Andrew J. HOWLETT, Michael CHANDLER-PAGE, David P. SINGLETON, Erich P. ZWYSSIG, Craig MCADAM
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Patent number: 11978099Abstract: Computer-based platforms and interfaces for trading a commodity such as primary production commodities, including meat, leather, grains, fruit, vegetables, flowers, seeds, living plants and timber. In particular, a user interface provides for input and output of data or information via an electronic screen. The interface has a text-based chat function for communication between a buyer and a seller, an order function allowing the buyer to order a first product from the seller, and a hyperlinking function to transform a keyword related to the product input by the buyer in the course of using the text-based chat function into a hyperlink actuatable by the buyer. When the buyer actuates the hyperlink, the order function presents an input option for the buyer to add the first product to an order by way of the order function.Type: GrantFiled: October 27, 2020Date of Patent: May 7, 2024Assignee: PRIME X CONNECT PTY LTDInventor: Michael Chandler
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Patent number: 11809334Abstract: An integrated circuit comprises first and second interfaces, an internal addressable space comprising a plurality of address ranges, and a control unit. Each of the first and second interfaces is coupled to the internal addressable space via the control unit. The control unit is configurable in a first state in which the control unit is configured to allow or deny the second interface access to a subset of the plurality of address ranges of the internal addressable space.Type: GrantFiled: April 16, 2021Date of Patent: November 7, 2023Assignee: Cirrus Logic Inc.Inventors: Neil Whyte, Michael Chandler-Page, Pradeep Saminathan, Jon Eklund
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Publication number: 20230353937Abstract: Signal processing circuitry configured to receive an input signal and to output a processed output signal, wherein the signal processing circuitry is configured to: receive an indication of a temporal location of a transient in the input signal; and provide, in the processed output signal, a masking signal bridging the temporal location of the transient to mask the transient.Type: ApplicationFiled: November 8, 2022Publication date: November 2, 2023Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Andrew J. HOWLETT, Michael CHANDLER-PAGE, Lea S. GEORGIEVA
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Publication number: 20230353111Abstract: An integrated circuit (IC), comprising: a first input pin for receiving a first input signal; a first converter configured to convert the first input signal to a first output signal; a first gain stage configured to apply a first gain to the first output signal; gain update circuitry configured to: output a first external gain control signal to a first output pin of the IC; and subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage.Type: ApplicationFiled: November 8, 2022Publication date: November 2, 2023Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Andrew J. HOWLETT, Michael CHANDLER-PAGE, David P. SINGLETON, Erich P. ZWYSSIG
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Patent number: 11576326Abstract: The present invention provides a wheat plant comprising an Rht-B1 allele which encodes an Rht-B1 (DELLA) polypeptide. Grain from a near-isogenic wheat line comprising the dwarfing Rht-B1c allele was subjected to sodium azide mutagenesis. Plants exhibiting early leaf elongation rates or mature plant height greater than the dwarf parent were selected and the Rht-B1 gene sequenced. This identified 35 mutated alleles of Rht-B1c. Similar methods were also used to identify mutant alleles of the dwarfing sln1d allele in barley, where DELLA is encoded by the sln1 gene.Type: GrantFiled: June 19, 2020Date of Patent: February 14, 2023Assignees: COMMONWEALTH SCIENTIFIC AND INDUSTRIAL RESEARCH ORGANISATION, GRAINS RESEARCH AND DEVELOPMENT CORPORATIONInventors: Peter Michael Chandler, Carol Anne Harding
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Publication number: 20220408382Abstract: Implementations disclosed describe techniques and systems to facilitate efficient operations of wireless networks organized in a topology of communicating nodes. Techniques include cascade synchronization of various nodes of the network by generating and maintaining a common time using times associated with ordered communications between nodes. The common time maintained by the network allows performance of synchronous action for precise industrial, medical, and testing applications. The described techniques and systems further include management of communication windows between different nodes in a way that facilitates fast and efficient propagation of data collected by the network from multiple source nodes to one or more destination nodes.Type: ApplicationFiled: December 30, 2021Publication date: December 22, 2022Applicant: Cypress Semiconductor CorporationInventors: Manamohan D. Mysore, Ash Kapur, Michael Chandler, Victor Zhodzishsky
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Publication number: 20220383367Abstract: Computer-based platforms and interfaces for trading a commodity such as primary production commodities, including meat, leather, grains, fruit, vegetables, flowers, seeds, living plants and timber. In particular, a user interface provides for input and output of data or information via an electronic screen. The interface has a text-based chat function for communication between a buyer and a seller, an order function allowing the buyer to order a first product from the seller, and a hyperlinking function to transform a keyword related to the product input by the buyer in the course of using the text-based chat function into a hyperlink actuatable by the buyer. When the buyer actuates the hyperlink, the order function presents an input option for the buyer to add the first product to an order by way of the order function.Type: ApplicationFiled: October 27, 2020Publication date: December 1, 2022Inventor: Michael Chandler
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Publication number: 20220229784Abstract: An integrated circuit comprises first and second interfaces, an internal addressable space comprising a plurality of address ranges, and a control unit. Each of the first and second interfaces is coupled to the internal addressable space via the control unit. The control unit is configurable in a first state in which the control unit is configured to allow or deny the second interface access to a subset of the plurality of address ranges of the internal addressable space.Type: ApplicationFiled: April 16, 2021Publication date: July 21, 2022Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Neil WHYTE, Michael CHANDLER-PAGE, Pradeep SAMINATHAN, Jon EKLUND
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Publication number: 20220229937Abstract: An integrated circuit comprises first and second interfaces, an internal addressable space comprising a plurality of address ranges, and a control unit. Each of the first and second interfaces is coupled to the internal addressable space via the control unit. The control unit is configurable in a first state in which the control unit is configured to allow or deny the second interface access to a subset of the plurality of address ranges of the internal addressable space.Type: ApplicationFiled: August 4, 2021Publication date: July 21, 2022Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Michael CHANDLER-PAGE, Pradeep SAMINATHAN, Jon EKLUND, Neil WHYTE, José Arnaldo BIANCO FILHO, Abhinav SHARMA
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Patent number: 11161313Abstract: A tread support device (10) for a retread process is provided that has a first support roller (12) that rotates about a first support roller axis. A second support roller (16) is present that rotates about a second support roller axis. A third support roller (20) is also included that rotates about a third support roller axis. The first support roller (10), the second support roller (12), and the third support roller (20) all support a tread (24). Also in the tread support device (10), the first support roller axis, the second support roller axis, and the third support roller axis are arranged with respect to one another so as to be located on a circumference of a circle (32).Type: GrantFiled: March 27, 2017Date of Patent: November 2, 2021Assignee: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELINInventors: Chinglin Pan, Bruce Carney, Michael Chandler, Michael Widmyer
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Patent number: 10995343Abstract: The present invention provides a wheat plant comprising an Rht-B1 allele which encodes an Rht-B1 (DELLA) poly-peptide. Grain from a near-isogenic wheat line comprising the dwarfing Rht-B1c allele was subjected to sodium azide mutagenesis. Plants exhibiting early leaf elongation rates or mature plant height greater than the dwarf parent were selected and the Rht-B1 gene sequenced. This identified 35 mutated alleles of Rht-B1c. Similar methods were also used to identify mutant alleles of the dwarfing s1n1d allele in barley, where DELLA is encoded by the s1n1 gene.Type: GrantFiled: August 22, 2013Date of Patent: May 4, 2021Assignees: COMMONWEALTH SCIENTIFIC AND INDUSTRIAL RESEARCH ORGANISATION, GRAINS RESEARCH AND DEVELOPMENT CORPORATIONInventors: Peter Michael Chandler, Carol Anne Harding
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Publication number: 20210040497Abstract: The present invention provides a wheat plant comprising an Rht-B1 allele which encodes an Rht-B1 (DELLA) polypeptide. Grain from a near-isogenic wheat line comprising the dwarfing Rht-B1c allele was subjected to sodium azide mutagenesis. Plants exhibiting early leaf elongation rates or mature plant height greater than the dwarf parent were selected and the Rht-B1 gene sequenced. This identified 35 mutated alleles of Rht-B1c. Similar methods were also used to identify mutant alleles of the dwarfing sln1d allele in barley, where DELLA is encoded by the sln1 gene.Type: ApplicationFiled: June 19, 2020Publication date: February 11, 2021Applicants: Commonwealth Scientific and Industrial Research Organisation, Grains Research and Development CorporationInventors: Peter Michael Chandler, Carol Anne Harding
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Publication number: 20200298518Abstract: A tread support device (10) for a retread process is provided that has a first support roller (12) that rotates about a first support roller axis. A second support roller (16) is present that rotates about a second support roller axis. A third support roller (20) is also included that rotates about a third support roller axis. The first support roller (10), the second support roller (12), and the third support roller (20) all support a tread (24). Also in the tread support device (10), the first support roller axis, the second support roller axis, and the third support roller axis are arranged with respect to one another so as to be located on a circumference of a circle (32).Type: ApplicationFiled: March 27, 2017Publication date: September 24, 2020Inventors: CHINGLIN PAN, BRUCE CARNEY, MICHAEL CHANDLER, MICHAEL WIDMYER
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Publication number: 20150373814Abstract: A lighting control system for municipalities and recreation departments is disclosed. The lighting system can process payments so that a user can pay for usage of a recreational facility at the time of need. The lighting control system can communicate with remote systems such that only a single cellular connection or broadband connection is required.Type: ApplicationFiled: May 29, 2015Publication date: December 24, 2015Inventors: Marshall Claude Inzer, Michael Chandler Rochester