Abstract: An output driver has an output multiplexor and an output current driver. The output multiplexor receives a data signal and outputs a q-node signal. The output current 5 river receives the q-node signal and drives a bus based on the q-node signal. The output multiplexor processes the data signal in various ways to generate the q-node signal. The output current driver is responsive to current control bits to select a amount of output drive current. In addition, the output multiplexor is controlled such that the output impedance of the output current driver is maintained within a predetermined range.

Abstract: Apparatus and methods allocate I/O bandwidth of an electrical component, such as an IC, by configuring an I/O interface into various types of interfaces. In an embodiment of the present invention, an I/O interface is configured into either a bi-directional contact, unidirectional contact (including either a dedicated transmit or dedicated receive contact) or a maintenance contact used in a maintenance or calibration mode of operation. The I/O interface is periodically reconfigured to optimally allocate I/O bandwidth responsive to system parameters, such as changing data workloads in the electronic components.

Abstract: A system including an integrated circuit memory device. The integrated circuit device comprises a register to store a value representative of an output voltage setting. A circuit holds a value representative of an adjustment to the output voltage setting. An output driver outputs a drive voltage during a calibration operation, wherein a signal is generated based on a comparison between a signal derived from the drive voltage and a reference voltage. The signal updates the value representative of the adjustment to the output voltage setting.

Abstract: A method of operating a memory system that includes an integrated circuit memory device is provided. A value representing an output voltage setting of an output driver of the memory device is stored in a register. The output driver outputs the drive voltage. A signal derived from the drive voltage is compared to a reference signal to generate a signal that indicates an adjustment to the output voltage setting. The output voltage setting of the output driver is adjusted using a counter that holds a count value representing an update to the output voltage setting. The count value is updated in accordance with a signal that indicates the adjustment to the output voltage setting.

Abstract: A method of operating an integrated circuit including an output driver. The method includes storing a value in a register, wherein the value is representative of a voltage swing setting of an output driver. The voltage swing setting of the output driver is adjusted using a counter that holds a count value representing an update to the voltage swing setting. The count value is updated in accordance with a signal that indicates an adjustment to the voltage swing setting. In addition, an integrated circuit memory device comprising an output driver, a register and a counter is provided. The counter updates a count value in response to a signal that indicates a direction to adjust the count value.

Abstract: A bus driver circuit having slew rate control. According to one embodiment, the bus driver circuit includes the following elements: a first circuit having an input configured to receive a data signal and an output operative to output a drive signal in response to the data signal; a second circuit coupled in parallel with the first circuit and operative to receive a slew rate control signal; and a slew rate indicator circuit coupled to the second circuit. The slew rate indicator circuit determines the state of the slew rate control signal in response to operating conditions that cause variations in the slew rate of the drive signal such that when the slew rate control signal is asserted, the second circuit is enabled to affect the slew rate of the drive signal. For one embodiment, the slew rate indicator includes a pulse generator circuit and a clocked comparator circuit.