Abstract: A method and apparatus for efficiently constructing a bounding volume hierarchy (BVH). For example, one embodiment of an apparatus comprises: a primitive sampler to identify a representative subset of input primitives of a graphics scene; bounding volume hierarchy (BVH) builder hardware logic to construct an approximate BVH based on the representative subset of input primitives; hardware logic to insert input primitives not in the representative subset into leaves of the approximate BVH; and the BVH builder or a different BVH builder to construct a final BVH based on the primitives inserted into the leaves of the approximate BVH.

Abstract: Apparatus and method for accelerating bounding box merge operations. For example, one embodiment of an apparatus comprises: ray tracing acceleration hardware to be used to determine ray traversal results when traversing a ray through a bounding volume hierarchy (BVH), the BVH comprising a plurality of axis-aligned bounding boxes (AABBs); and a bounding box (BB) merge accelerator coupled to one or more execution units and coupled to a local memory in which to store a group of the AABBs, the BB merge accelerator, in response to the one or more EUs, to determine a second AABB to merge with a first AABB in accordance with a specified distance function.

Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.

Abstract: A method of generating recommendations for a collective profile, the collective profile being linked to a first profile and a second profile. The method may include authenticating a login request from an end user device in association with the collective profile based on credentials associated with the first profile, identifying a query from among a plurality of queries and transmit the query to the end user device, receiving a response to the query, determining that the response is not inconsistent with one or more earlier responses received in association with the second profile and, in response, refining at least one attribute or goal in the collective profile based on the response to generate and store a refined collective profile, and determining whether the refined collective profile results in a new recommendation and, if so, outputting the new recommendation.

Abstract: An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes.

Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.

Abstract: A method for production of renewable hydrocarbons, including alpha olefins, renewable diesel, synthetic gasoline, and acyl-glycerides, from renewable oils is described herein. Also included is a method for production comprising (a) blending a specific renewable oil mixture with the proper free fatty acid character; (b) acid hydrolysis of the free fatty acids and subsequent purification of the unsaturated and saturated chains; (c) converting the saturated portion into renewable diesel; and (d) reacting the unsaturated free fatty acids via ethenolysis to form alpha olefins, then converting the remaining free fatty acids into either synthetic gasoline or into an acyl-glycerol via glycerolysis.

Abstract: Apparatus and method for a hierarchical beam tracer.

Abstract: Apparatus and method for efficient BVH construction. For example, one embodiment of an apparatus comprises: a memory to store graphics data for a scene including a plurality of primitives in a scene at a first precision; a geometry quantizer to read vertices of the primitives at the first precision and to adaptively quantize the vertices of the primitives to a second precision associated with a first local coordinate grid of a first BVH node positioned within a global coordinate grid, the second precision lower than the first precision; a BVH builder to determine coordinates of child nodes of the first BVH node by performing non-spatial-split binning or spatial-split binning for the first BVH node using primitives associated with the first BVH node, the BVH builder to determine final coordinates for the child nodes based, at least in part, on an evaluation of surface areas of different bounding boxes generated for each of the child node.

Abstract: Apparatus and method for compression of acceleration structure build data in a ray tracing implementation. For example, one embodiment of an apparatus comprises: traversal hardware logic to traverse rays through a graphics scene comprising a plurality of primitives; and an acceleration data structure processing unit comprising: a bounding box compressor to compress a set of bounding boxes to generate a plurality of bounding box compression blocks, and an index compressor to compress a set of indices to generate a plurality of index compression blocks, and an acceleration data structure builder for constructing acceleration structures based on bounding box compression blocks and index compression blocks.

Abstract: An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes.

Abstract: Apparatus and method for a hierarchical beam tracer.

Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.

Abstract: A system for secure data protection and encryption for computing devices. The present invention includes a fast encryption technique for quickly ensuring that the correct binding parameters are used for an encrypted data file. The encrypted file is used in two ways. Because unsecure data could pass through a peripheral device to gain access to a secure computing environment, a dongle housing encryption and decryption subsystems is placed in between the unsecure sources and the peripheral that can encrypt and decrypt data intended for the secure computing environment. The firmware of the computing device can be updated by dividing the update file into encrypted segments that are verified on the device and placed into non-volatile memory. When all parts have been received, decrypted, and written into memory, the device reboots using the updated firmware.

Abstract: Apparatus and method for efficient BVH construction. For example, one embodiment of an apparatus comprises: a memory to store graphics data for a scene including a plurality of primitives in a scene at a first precision; a geometry quantizer to read vertices of the primitives at the first precision and to adaptively quantize the vertices of the primitives to a second precision associated with a first local coordinate grid of a first BVH node positioned within a global coordinate grid, the second precision lower than the first precision; a BVH builder to determine coordinates of child nodes of the first BVH node by performing non-spatial-split binning or spatial-split binning for the first BVH node using primitives associated with the first BVH node, the BVH builder to determine final coordinates for the child nodes based, at least in part, on an evaluation of surface areas of different bounding boxes generated for each of the child node.

Abstract: A method and apparatus for efficiently constructing a bounding volume hierarchy (BVH). For example, one embodiment of an apparatus comprises: a primitive sampler to identify a representative subset of input primitives of a graphics scene; bounding volume hierarchy (BVH) builder hardware logic to construct an approximate BVH based on the representative subset of input primitives; hardware logic to insert input primitives not in the representative subset into leaves of the approximate BVH; and the BVH builder or a different BVH builder to construct a final BVH based on the primitives inserted into the leaves of the approximate BVH.

Abstract: Apparatus and method for generating a quasi-random sequence. For example, one embodiment of an apparatus comprises: a graphics processor comprising execution resources to execute graphics instructions; and quasi-random sequence generation logic implemented, at least in part, in program code executed by an execution unit, the quasi-random sequence generation logic to generate a Sobol number sequence to be used by the graphics processor for rendering operations, the Sobol sequence generator to perform the operations of: generating white noise bits; mixing the white noise bits with Sobol bits to generate a quasi-random result sequence.

Abstract: A method of generating recommendations for a collective profile, the collective profile being linked to a first profile and a second profile. The method may include authenticating a login request from an end user device in association with the collective profile based on credentials associated with the first profile, identifying a query from among a plurality of queries and transmit the query to the end user device, receiving a response to the query, determining that the response is not inconsistent with one or more earlier responses received in association with the second profile and, in response, refining at least one attribute or goal in the collective profile based on the response to generate and store a refined collective profile, and determining whether the refined collective profile results in a new recommendation and, if so, outputting the new recommendation.

Abstract: A jam free dual redundant actuator lane changer system includes a primary lane system and a secondary lane system. The primary lane system is configured to provide actuation of a component during a normal operation while the secondary lane system remains in a standby configuration; and the secondary lane system is configured to provide an actuation of the component when the primary lane system fails or jams, but freed from its output to the component.

Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.