Patents by Inventor Michael Doyle

Michael Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230165321
    Abstract: A wrist guard and a gloved wrist guard are disclosed for providing coverage and protection of the radiocarpal joint including the distal end of the radius, the ulna and the carpal bones as well as the dorsal aspect of the metacarpals.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 1, 2023
    Inventors: Christopher James Doyle, Kevin Michael Doyle
  • Patent number: 11622596
    Abstract: A force absorbing device for a footwear appliance includes a shoe upper and a shoe sole having a planar sole surface, such that forces between the shoe upper and planar sole surface in ground contact are absorbed by force mitigation assemblies disposed in the shoe sole. A force mitigation assembly adapted for an athletic shoe includes a linkage to a wearer interface responsive to movement based on activity of the wearer. An attachment to a sole surface receives ground forces transmitted from frictional contact between the sole surface and a surface against which the sole is disposed, such as for running, turning, etc. A force mitigation assembly absorbs these forces received from the sole surface for directing the received force in a controlled manner. An elastic field in the force mitigation assembly is defined by a resilient material adapted to deform in response to the received force.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: April 11, 2023
    Assignee: Worcester Polytechnic Institute
    Inventors: Christopher A. Brown, Winton Parker, James J. Muller, Abigale McAdams, Pedro D. Oporto, Josephine Bowen, Sarah Duquette, Eric Motler, Tristin J. Carlton, Nicholas Workman, Michael Doyle, Jessica Shelsky, Jessica K. Y. Cheu, Lorenzo M. Dube, Olivia G. Steen, Andrew R. Vickery
  • Publication number: 20220414970
    Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.
    Type: Application
    Filed: July 19, 2022
    Publication date: December 29, 2022
    Inventors: Gabor LIKTOR, Karthik VAIDYANATHAN, Jefferson AMSTUTZ, Atsuo KUWAHARA, Michael DOYLE, Travis SCHLUESSLER
  • Publication number: 20220327763
    Abstract: Apparatus and method for a hierarchical beam tracer.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 13, 2022
    Inventors: Scott JANUS, Prasoonkumar SURTI, Karthik VAIDYANATHAN, Alexey SUPIKOV, Gabor LIKTOR, Carsten BENTHIN, Philip LAWS, Michael DOYLE
  • Publication number: 20220327655
    Abstract: An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 13, 2022
    Applicant: Intel Corporation
    Inventors: MICHAEL DOYLE, TRAVIS SCHLUESSLER, GABOR LIKTOR, ATSUO KUWAHARA, JEFFERSON AMSTUTZ
  • Patent number: 11445784
    Abstract: A force absorbing device for a footwear appliance includes a shoe upper and a shoe sole having a planar sole surface, such that forces between the shoe upper and planar sole surface in ground contact are absorbed by force mitigation structures disposed in the shoe sole. A footwear article includes a split-sole system that redefines a shoe sole as coplanar surfaces having a force mitigating interface for receiving sudden forces and effectively mitigating these forces by storing kinetic energy and releasing it over time. An elastic field in the force mitigation structure is defined by a resilient material adapted to deform in response to the received force. Frictional engagement between the upper and lower sole may also be augmented by surface characteristics such as dimples, voids and lubricants, in addition to interference engagement with an elastic field.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: September 20, 2022
    Assignee: Worcester Polytechnic Institute
    Inventors: Christopher A. Brown, James J. Muller, Winton Parker, Allysa Grant, Tristin J. Carlton, Nicholas Workman, Michael Doyle, Jessica Shelsky, Jessica K. Y. Cheu, Lorenzo Dube, Pedro D. Oporto, Olivia G. Steen, Andrew R. Vickery
  • Patent number: 11442111
    Abstract: An automated system and method to investigate degradation of cathode materials in batteries via atomistic simulations, and in particular by simulating the creation of atomistic defects in the cathode material, which occurs during charge cycling. A systematic procedure relates the degradation of battery performance metrics to underlying structural changes due to atomic rearrangements within the material, for example through density functional theory simulations. The performance metrics modeled with this approach include the Open Cell Voltage (OCV) as well as the discharge capacity curve.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: September 13, 2022
    Assignee: DASSAULT SYSTEMES AMERICAS CORP.
    Inventors: Johan Carlsson, Kwan Skinner, Michael Doyle, Nick Reynolds, Lalitha Subramanian, Felix Hanke
  • Publication number: 20220270319
    Abstract: Apparatus and method for efficient BVH construction. For example, one embodiment of an apparatus comprises: a memory to store graphics data for a scene including a plurality of primitives in a scene at a first precision; a geometry quantizer to read vertices of the primitives at the first precision and to adaptively quantize the vertices of the primitives to a second precision associated with a first local coordinate grid of a first BVH node positioned within a global coordinate grid, the second precision lower than the first precision; a BVH builder to determine coordinates of child nodes of the first BVH node by performing non-spatial-split binning or spatial-split binning for the first BVH node using primitives associated with the first BVH node, the BVH builder to determine final coordinates for the child nodes based, at least in part, on an evaluation of surface areas of different bounding boxes generated for each of the child node.
    Type: Application
    Filed: May 3, 2022
    Publication date: August 25, 2022
    Applicant: Intel Corporation
    Inventors: MICHAEL DOYLE, KARTHIK VAIDYANATHAN
  • Patent number: 11398068
    Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: July 26, 2022
    Assignee: INTEL CORPORATION
    Inventors: Gabor Liktor, Karthik Vaidyanathan, Jefferson Amstutz, Atsuo Kuwahara, Michael Doyle, Travis Schluessler
  • Publication number: 20220222218
    Abstract: Embodiments of systems and methods as disclosed may provide a platform agnostic way to edit content within an enterprise. For example, a platform independent thin client editor may be provided such that this editor can be accessed by users at a variety of computing platforms across the distributed computer network of an enterprise, regardless of the platform from which the thin client editor is being accessed. Moreover, certain embodiments may provide a role based mechanism for controlling the editing of content. Embodiments of such a role based mechanism may allow one editor of a content item to designate a role associated with the content item so that only users associated with that role may be allowed to edit the content item or portion of the content item.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Inventors: Jeffrey Alan Cole, James Matthew Downs, Steven Mark Cheal, Jack Dwane Gilvin, Jeffrey Michael Doyle
  • Patent number: 11379532
    Abstract: A method of generating recommendations for a collective profile, the collective profile being linked to a first profile and a second profile. The method may include authenticating a login request from an end user device in association with the collective profile based on credentials associated with the first profile, identifying a query from among a plurality of queries and transmit the query to the end user device, receiving a response to the query, determining that the response is not inconsistent with one or more earlier responses received in association with the second profile and, in response, refining at least one attribute or goal in the collective profile based on the response to generate and store a refined collective profile, and determining whether the refined collective profile results in a new recommendation and, if so, outputting the new recommendation.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: July 5, 2022
    Assignee: The Toronto-Dominion Bank
    Inventors: Mansi Rastogi, Jane Holtslander, Michael Doyle, Kristopher Okera Gibbs, Mary Ann Duarte, Tonja Selena Launen, Alla Chichkina, Ellen Rebecca Heise, Anna Anatolievna Sakoun, Seonaid Marlaine Eggett, Paul Thomas McGhee, Chantale Oliveira
  • Publication number: 20220194560
    Abstract: A jam free dual redundant actuator lane changer system includes a primary lane system and a secondary lane system. The primary lane system is configured to provide actuation of a component during a normal operation while the secondary lane system remains in a standby configuration; and the secondary lane system is configured to provide an actuation of the component when the primary lane system fails or jams, but freed from its output to the component.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Shijie Liu, Kurt Goldhammer, Douglas Campbell, Philip DeMauro, Michael Doyle, Alan Powers, Philip Chivily
  • Patent number: 11354277
    Abstract: Embodiments of systems and methods as disclosed may provide a platform agnostic way to edit content within an enterprise. For example, a platform independent thin client editor may be provided such that this editor can be accessed by users at a variety of computing platforms across the distributed computer network of an enterprise, regardless of the platform from which the thin client editor is being accessed. Moreover, certain embodiments may provide a role based mechanism for controlling the editing of content. Embodiments of such a role based mechanism may allow one editor of a content item to designate a role associated with the content item so that only users associated with that role may be allowed to edit the content item or portion of the content item.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: June 7, 2022
    Assignee: OPEN TEXT CORPORATION
    Inventors: Jeffrey Alan Cole, James Matthew Downs, Steven Mark Cheal, Jack Dwane Gilvin, Jeffrey Michael Doyle
  • Publication number: 20220138264
    Abstract: A method of generating recommendations for a collective profile, the collective profile being linked to a first profile and a second profile. The method may include authenticating a login request from an end user device in association with the collective profile based on credentials associated with the first profile, identifying a query from among a plurality of queries and transmit the query to the end user device, receiving a response to the query, determining that the response is not inconsistent with one or more earlier responses received in association with the second profile and, in response, refining at least one attribute or goal in the collective profile based on the response to generate and store a refined collective profile, and determining whether the refined collective profile results in a new recommendation and, if so, outputting the new recommendation.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Applicant: The Toronto-Dominion Bank
    Inventors: Mansi RASTOGI, Jane HOLTSLANDER, Michael DOYLE, Kristopher Okera GIBBS, Mary Ann DUARTE, Tonja Selena LAUNEN, Alla CHICHKINA, Ellen Rebecca HEISE, Anna Anatolievna SAKOUN, Seonaid Marlaine EGGETT, Paul Thomas MCGHEE, Chantale OLIVEIRA
  • Patent number: 11321910
    Abstract: Apparatus and method for efficient BVH construction. For example, one embodiment of an apparatus comprises: a memory to store graphics data for a scene including a plurality of primitives in a scene at a first precision; a geometry quantizer to read vertices of the primitives at the first precision and to adaptively quantize the vertices of the primitives to a second precision associated with a first local coordinate grid of a first BVH node positioned within a global coordinate grid, the second precision lower than the first precision; a BVH builder to determine coordinates of child nodes of the first BVH node by performing non-spatial-split binning or spatial-split binning for the first BVH node using primitives associated with the first BVH node, the BVH builder to determine final coordinates for the child nodes based, at least in part, on an evaluation of surface areas of different bounding boxes generated for each of the child node.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: May 3, 2022
    Assignee: Intel Corporation
    Inventors: Michael Doyle, Karthik Vaidyanathan
  • Patent number: 11315213
    Abstract: An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: April 26, 2022
    Assignee: Intel Corporation
    Inventors: Michael Doyle, Travis Schluessler, Gabor Liktor, Atsuo Kuwahara, Jefferson Amstutz
  • Patent number: 11315304
    Abstract: Apparatus and method for a hierarchical beam tracer.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: April 26, 2022
    Assignee: INTEL CORPORATION
    Inventors: Scott Janus, Prasoonkumar Surti, Karthik Vaidyanathan, Alexey Supikov, Gabor Liktor, Carsten Benthin, Philip Laws, Michael Doyle
  • Publication number: 20220051466
    Abstract: Apparatus and method for compression of acceleration structure build data in a ray tracing implementation.
    Type: Application
    Filed: October 28, 2020
    Publication date: February 17, 2022
    Inventors: Michael Doyle, Sreenivas Kothandaraman
  • Patent number: 11153463
    Abstract: A camera capable of quickly updating a region of interest (ROI) in its sensor array is provided. The camera is configured to image individual scan lines of a scan imager created as a scan beam is scanned across a subject. A different ROI is defined for each scan line to be imaged. To achieve this, a table of ROI-defining entries is loaded into the camera prior to imaging the scan lines. The ROI-defining entries are used to update the sensor's ROI during the camera's Frame-Overhead-Time. In this manner, the ROI is changed in between the imaging of consecutive scans lines.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: October 19, 2021
    Assignee: CARL ZEISS MEDITEC, INC.
    Inventors: Michael Doyle, Keith E. O'Hara, Csaba Farkas
  • Publication number: 20210287419
    Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.
    Type: Application
    Filed: January 27, 2021
    Publication date: September 16, 2021
    Inventors: Gabor LIKTOR, Karthik VAIDYANATHAN, Jefferson AMSTUTZ, Atsuo KUWAHARA, Michael DOYLE, Travis SCHLUESSLER