Abstract: A solid electrolyte including an inorganic lithium ion conductive film and a porous layer on a surface of the inorganic lithium ion conductive film, wherein the porous layer includes a first porous layer and a second porous layer, and the second porous layer is disposed between the inorganic lithium ion conductive film and the first porous layer, and wherein the first porous layer has a size greater which is than a pore size of the second porous layer.

Abstract: A seawater feedstock input is provided to accurately supply seawater from an input seawater feedstock supply. The seawater feedstock will be used for the production of hydrogen gas (H2) from seawater. The seawater feedstock could be acidified as shown with concentration of ionized hydrogen ions in the seawater CO2(aq)+H2OH2CO3HCO3?+H+CO32?+2 H+ and that this increased ionized hydrogen (H+) can be included in the production of hydrogen gas (H2) from seawater that will be used in today's fuel cell technologies, transportation, power plants, and space propulsion technologies, as well as, other technologies. The proposed process is to be duplicated and utilized in a unique scientifically engineered dissociation hydrogen gas (H2) production system.

Abstract: The invention includes a sputtering component comprising a sputtering surface. At least 99 atomic % of the sputtering surface consists of a single phase corresponding to a solid solution of two or more elements in elemental form. Additionally, an entire volume of the sputtering component can consist of the single phase corresponding to the solid solution of the two or more elements in elemental form. The invention encompasses methods of forming mixed-metal materials utilizing one or more of a reduction process, electrolysis process and iodide process.

Abstract: Substrate bombardment during HDP deposition of carbon-doped silicon oxide film results in filling the gaps between metal lines with carbon-doped low k dielectric material. This leads to the placement of low k dielectric between the narrow metal lines while the films over the metal lines have higher dielectric constant due to removal of carbon from these films during ion bombardment. Films over the metal lines have properties similar to silicon dioxide and are ready for sequential integration processes.

Abstract: A contact opening (940) is provided in a dielectric layer (720) overlaying a gate electrode (840). The contact opening and gate electrode are of substantially the same width, thus allowing for minimized area contact. A pair of process buffering regions (810) situated along the sidewalls of the gate electrode furnish additional landing area for the contact opening without exposing the sidewalls of the gate electrode.

Abstract: A process for preparing a light-sensitive integrated circuit (IC) for packaging that provides a reduced exposure of the light-sensitive IC to light. The process includes providing a semiconductor substrate (e.g., a silicon wafer) with a plurality of light-sensitive ICs formed in/on its upper surface. The lower surface is optionally coated with opaque material. Next, the semiconductor substrate is diced to form individual light-sensitive ICs, each of which has a semiconductor substrate lower surface and semiconductor substrate lateral edges. The semiconductor substrate lateral edges (and optionally backside) are then spray coated with an opaque material (e.g., opaque ink) to form an opaque layer covering the semiconductor substrate lateral edges. The opaque layer prevents light from entering the semiconductor substrate through the lateral edges and interfering with the operation of the light-sensitive IC.

Abstract: A material may include grains of sizes such that at least 99% of a measured area contains grains that exhibit grain areas less than 10 times an area of a mean grain size of the measured area. As examples, at least 99% of the measured area may contain grains with grain areas less than 8, 6, or 3 times the area of the mean grain size. The grains may also have a mean grain size of less than 3 times a minimum statically recrystallized grain size, for example, a mean grain size of less than about 50 microns, 10 microns, or 1 micron. The material may be comprised by a sputtering target and a thin film may be deposited on a substrate from such a sputtering target. A micro-arc reduction method may include sputtering a film from a sputtering target comprising grains of sizes as described. A sputtering target forming method may include deforming a sputtering material. After the deforming, the sputtering material may be shaped into at least a portion of a sputtering target.

Abstract: Atomic oxygen, or a mixture of atomic oxygen and atomic nitrogen, is utilized in thermally oxidizing silicon to form a layer of silicon dioxide, or nitrogen-doped silicon dioxide, on a surface of the silicon. Use of atomic oxygen (or O−+N−) provides a better stoichiometric silicon dioxide structure with fewer dangling bonds than results from standard oxidation processes. The atomic oxygen (or O−+N−) may be generated within the oxidation furnace, for example by passing the gas through a heated ceramic material (e.g., Al2O3) or by using internal UV radiation of the oxygen gas. Alternatively, the atomic oxygen (or O−+N−) may be generated at a remote source, for example in a plasma reactor, and then introduced to the oxidation furnace. Atomic chlorine can be generated and used prior to the oxidation step for pre-cleaning the silicon surface.

Abstract: A planarization process in which an organic film prevents oxide dishing during the chemical mechanical polishing step. In the planarization process an organic film having high CMP selectivity to silicon dioxide is spun over silicon dioxide. A patterned mask is then placed over the organic film and the exposed portions of the organic film are etched away. The remaining portions of the organic film prevent oxide dishing during chemical mechanical polishing because the high CMP selectivity of the organic film to silicon dioxide stops the etching before oxide dishing occurs. The organic film may then be oxygen ashed off the planarized surface if so desired.

Abstract: Substrate bombardment during HDP deposition of carbon-doped silicon oxide film results in filling the gaps between metal lines with carbon-doped low k dielectric material. This leads to the placement of low k dielectric between the narrow metal lines while the films over the metal lines have higher dielectric constant due to removal of carbon from these films during ion bombardment. Films over the metal lines have properties similar to silicon dioxide and are ready for sequential integration processes.

Abstract: Contact openings are formed in a dielectric layer overlying conductive paths where the openings and the paths have essentially the same dimension or width, thus allowing for minimized area contacts. Process buffering regions are formed adjacent the conductive paths to provide additional landing area for the contact openings without exposing the sidewall of the conductive path. In some embodiments the contact openings and methods for forming thereof provide electrical coupling between metal layers of a multilevel metal structure or for electrically coupling polysilicon layers and metal layers. In some embodiments the contact opening and methods for forming thereof provide for direct contact to a gate electrode.

Abstract: A method for removing a resistive film formed on an electrode to increase the conductive contact area of the electrode positioned in a misaligned contact hole. The method comprises providing a substrate supporting an electrode layer. The electrode layer is etched to produce metal lines. During the processing of the metal lines, a resistive film is formed thereon. The resistive film is removed and a protective barrier is formed on the metal lines. A dielectric layer is formed on the substrate, including the metal lines. The dielectric layer is subsequently patterned to form contact holes or vias to expose a portion of the metal lines. The contact holes are filled with plugs such that a second electrode layer can be formed on the dielectric layer and the plugs.

Abstract: Sidewall spacers, adjacent a gate electrode and source/drain regions of a MOS transistor are formed of a dielectric material that can be completely or partially removed to “lift-off” silicide stringers if formed. After silicide stringer removal, a dielectric layer, having a first portion and second portion that are selectively etchable with respect to one another, is deposited. A gate contact opening is formed in the dielectric layer where the opening is essentially the same dimension as the gate length. Alignment of the opening to the gate electrode is buffered by the thickness of the first portion of the dielectric layer, adjacent sidewalls of the gate electrode.

Abstract: A process for forming a via in a semiconductor device using a self-aligned tungsten pillar to connect upper and lower conductive layers separated by a dielectric. A Ti/TiN layer is formed on an underlying substrate layer, an aluminum-copper layer is formed on the Ti/TiN layer, a TiN layer is formed on the aluminum-copper layer and a tungsten layer is formed on the TiN layer. In one continuous etching step, the stack of tungsten, TiN, Al--Cu, Ti/TiN is then patterned and etched. A first dielectric is deposited overlying the exposed regions of the substrate layer and the conductive stack. The wafer is then planarized to expose the top of the tungsten layer. The wafer is again patterned and the tungsten is etched using the titanium nitride as an etch stop. A second dielectric is deposited to fill the resulting gaps and CMP processes are used to planarize the wafer and expose the top of the tungsten pillar.

Abstract: A method for solid state formation of diamond includes providing a diamond growth substrate, such as single-crystal silicon, forming on the diamond growth substrate an alloy of carbon and a metal which permits carbon to exist in a matrix therein, and causing carbon atoms from the alloy to precipitate on the diamond growth substrate in a diamond cubic lattice. The alloy may be an alloy of aluminum and carbon. The alloy is annealed in a hydrogen ambient to cause diffusion of hydrogen through the alloy to the surface of the substrate, providing a high concentration of hydrogen at the interface between the substrate and the alloy. The alloy is heated to cause carbon atoms in the alloy to diffuse through the alloy to the interface and form diamond.

Abstract: A layer of silicon oxide is first formed on the silicon substrate. A mask is then formed on the oxide layer to define at least one surface region of the oxide that is not covered by the mask and a continuous strip of mask material that extends continuously around the unmasked oxide surface region. The mask is then used to etch the oxide surface region to expose an underlying substrate surface region and, thereby creating a continuous wall of oxide around the substrate surface region. The mask is then removed and oxygen ions are implanted into the silicon substrate to define a horizontal layer of oxide ions within the substrate. The wall of oxide surrounding the substrate surface region impairs the implant of oxygen ions beneath the wall such that a continuous substantially vertical wall of oxygen ions is formed in the substrate extending from the perimeter of the horizontal oxygen ion layer to the surface of the substrate.

Abstract: An integrated read/write head structure saves and retrieves saved data stored in storage locations on a ferroelectric optical storage medium. A first ultra-violet light source generates a single beam for exciting the electrons of a ferroelectric molecule of the optical storage medium. An induced electric field transducer orients the potential difference of the ferroelectric molecule during saving data. A second ultra-violet light source generates a single beam and a MOSFET transistor detects the electric fields from a ferroelectric molecule.

Abstract: An integrated read/write head structure saves and retrieves saved data stored in storage locations on a ferroelectric optical storage medium. A first ultra-violet light emitting diode generates a single beam for exciting the electrons of a ferroelectric molecule of the optical storage medium. An induced electric field transducer orients the ferroelectric molecules potential difference during saving data. A second ultra-violet light emitting diode generates a single beam and a silicon photo diode detects the reflected ultra-violet light from a ferroelectric molecule.

Abstract: A wafer coating apparatus for use in the application of a viscous precursor fluid on a substrate surface of a silicon substrate. The coating apparatus includes a carrier mechanism adapted to support the substrate thereon; and a coating head having a deposition surface positioned proximate and substantially parallel to the substrate surface. The deposition surface defines at least one orifice in flow communication with the precursor fluid for deposition thereof between the substrate surface and the deposition surface. The coating apparatus further includes a rotating device coupled to at least one of the coating head and the carrier mechanism for relative rotational movement between the deposition surface and the substrate surface about a rotational axis to form a thin circular film coating on the substrate surface. A method of coating a silicon substrate surface of a substrate is also provided.

Abstract: Sidewall spacers, adjacent a gate electrode and source/drain regions of a MOS transistor are formed of a dielectric material that can be etched selectively to the material selected as the isolation dielectric. A layer of silicide forming metal is deposited overlying the MOS transistor and heated, wherein silicide regions are formed where the metal makes contact with silicon, for example, in the gate electrode and source/drain regions. At least a portion of the sidewall spacers are etched-away and silicide stringers, if formed on the spacers, are removed.