Abstract: A sorting circuit includes: a stack of registers for storing a set of data values from a highest value to a lowest value; a set of comparators for substantially simultaneously comparing an input data value to the set of data values stored in the registers, where the comparators enable registers whose stored data values are less than the input data values to receive a replacement data value; and a set of multiplexers, each associated with a register in the stack to select the replacement data value when the register is enabled. The multiplexer selects the input data value to be the replacement data value if the register is the highest register in the stack currently storing a data value that is less than the input data value. Otherwise, the multiplexer selects the data value stored in the next-highest register in the stack to be the replacement data value.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root, value, and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: A sorting circuit includes: a stack of registers for storing a set of data values from a highest value to a lowest value; a set of comparators for substantially simultaneously comparing an input data value to the set of data values stored in the registers, where the comparators enable registers whose stored data values are less than the input data values to receive a replacement data value; and a set of multiplexers, each associated with a register in the stack to select the replacement data value when the register is enabled. The multiplexer selects the input data value to be the replacement data value if the register is the highest register in the stack currently storing a data value that is less than the input data value. Otherwise, the multiplexer selects the data value stored in the next-highest register in the stack to be the replacement data value.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root, value, and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root, value, and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root value and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: For producing an Nb3Sn superconductor wire, restack rod process (RRP) subelements (1a; 60a) are grouped to form a bundle having an approximately circular cross section and are arranged together with filling elements (18a-18c) in an internally and externally round outer tube (19; 52). To the inside the filling elements form a serrated profile (25) for abutment against the hexagonal subelements, and to the outside they form a round profile (24) for direct or indirect abutment in the outer tube. In fabricating the RRP subelements, and before a reshaping with a reduction in cross section, an externally hexagonal and internally round casing structure (9) is provided, into which the remaining parts of the subelements are inserted, in particular, an annular arrangement of hexagonal Nb-containing rod elements (4), which are surrounded externally by an outer matrix (7, 61) and internally by an inner matrix (3).

Abstract: For producing an Nb3Sn superconductor wire, restack rod process (RRP) subelements (1a; 60a) are grouped to form a bundle having an approximately circular cross section and are arranged together with filling elements (18a-18c) in an internally and externally round outer tube (19; 52). To the inside the filling elements form a serrated profile (25) for abutment against the hexagonal subelements, and to the outside they form a round profile (24) for direct or indirect abutment in the outer tube. In fabricating the RRP subelements, and before a reshaping with a reduction in cross section, an externally hexagonal and internally round casing structure (9) is provided, into which the remaining parts of the subelements are inserted, in particular, an annular arrangement of hexagonal Nb-containing rod elements (4), which are surrounded externally by an outer matrix (7, 61) and internally by an inner matrix (3).

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root value and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: A new heat treatment for Internal-Tin Nb3Sn strands is described. The heat treatment uses Nausite membranes to decrease the volume fraction of the ? phase and therefore minimize its liquefaction—ultimately resulting in better connected Nb3Sn. The heat treatment requires only one stage aside from the final Nb3Sn reaction stage. This heat treatment enables an increase in critical current density (at 16 T) of 28%.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root value and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: Methods for producing a multifilament Nb3Sn superconducting wire having a Jc value of at least 2000 A/mm2 at 4.2 K and 12 T by a) packing a plurality of Cu encased Nb rods within a first matrix which is surrounded by an intervening Nb diffusion barrier and a second matrix on the other side of the barrier remote from the rods thereby forming a packed subelement for the superconducting wire; b) providing a source of Sn within the subelement; c) assembling the metals within the subelement, the relative sizes and ratios of Nb, Cu and Sn being selected such that (i) the Nb fraction of the subelement cross section including and within the diffusion barrier is from 50 to 65% by area; (ii) the atomic ratio of the Nb to Sn including and within the diffusion barrier of the subelement is from 2.7 to 3.7; (iii) the ratio of the Sn to Cu within the diffusion barrier of the subelement is such that the Sn wt %/(Sn wt %+Cu wt %) is 45%-65%; (iv) the Cu to Nb local area ratio (LAR) of the Cu-encased Nb rods is from 0.10 to 0.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root value and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: A system for managing trading orders comprises a memory operable to store a first order associated with a particular trading product, wherein the first order is associated with a first price comprising a first root value. The system further comprises a processor communicatively coupled to the memory and operable to receive a second order associated with the particular trading product. The second order is associated with a second price; and the second price comprises a second root value and a particular fractional pip value. The processor is further operable to disclose the first root value and the second root value while suppressing the particular fractional pip value.

Abstract: A new heat treatment for Internal-Tin Nb3Sn strands is described. The heat treatment uses Nausite membranes to decrease the volume fraction of the ? phase and therefore minimize its liquefaction—ultimately resulting in better connected Nb3Sn. The heat treatment requires only one stage aside from the final Nb3Sn reaction stage. This heat treatment enables an increase in critical current density (at 16 T) of 28%.

Abstract: Interleaving multiple streams of data using a universal services multiplexer is followed by conveying a time interleaved multiplexer stream to a remote QAM module. A universal services multiplexer interleaves multiple streams of data into a time interleaved multiplexer stream.

Abstract: Single-photon avalanche diode includes a central junction having a central p+ area and a deep-n well in contact with the central p+ area, a p-type guard ring disposed between the central junction and the deep-n well, and a shallow trench isolation separated from the central p+ area. Imaging apparatus includes a plurality of pixels, each pixel comprising a complementary metal-oxide-semiconductor-implemented single photon avalanche device and one or more signal converters electrically coupled thereto and configured to detect changes in output therefrom.

Abstract: Single-photon avalanche diode includes a central junction having a central p+ area and a deep-n well in contact with the central p+ area, a p-type guard ring disposed between the central junction and the deep-n well, and a shallow trench isolation separated from the central p+ area. Imaging apparatus includes a plurality of pixels, each pixel comprising a complementary metal-oxide-semiconductor-implemented single photon avalanche device and one or more signal converters electrically coupled thereto and configured to detect changes in output therefrom.

Abstract: A vehicle includes a vehicle frame and an optical device mounted on the vehicle frame. A first temperature sensor senses ambient air temperature surrounding the vehicle frame, a second temperature sensor senses a temperature of a lens of the optical device, and a humidity sensor senses moisture content of air proximal to the lens. An exhaust directs gas at the lens in response to the sensed ambient air temperature, the sensed lens temperature, and the sensed moisture content.

Abstract: A complementary metal oxide semiconductor (CMOS)-integrated junction field effect transistor (JFET) has reduced scale and reduced noise. An exemplary JFET has a substrate layer of one dopant type with a gate layer of that dopant type disposed on the substrate, a depletion channel of a second dopant type disposed on the first gate layer, and a second gate layer of the first dopant type disposed on the depletion channel and proximate a surface of the transistor. The second gate layer can separate the depletion channel from the surface, and the depletion channel separates the first gate layer from the second gate layer.