Abstract: A microwave integrated circuit chip having microwave transmission line coupled to an input of a microwave circuitry: The microwave transmission line comprises: a substrate; a strip conductor disposed on a first surface of the substrate, such strip conductor having an input signal pad at one end thereof, and a ground plane disposed on a second, opposite surface of the substrate. The microwave circuitry has capacitive input impedance. The chip includes a via passing from the first surface of the substrate, through the substrate, to the ground plane. A test probe ground pad is disposed on the first surface of the substrate and spaced from a portion of the via disposed on the first surface of the substrate.

Abstract: A circuit for sensing radio frequency energy. The circuit includes a Wheatstone bridge having at least one element thereof thermally responsive to the radio frequency energy passing therethough differently from radio frequency energy passing though at least one other element of the bridge.

Abstract: A circuit for determining temperature of an active semiconductor device disposed on a semiconductor substrate and a Wheatstone bridge circuit. The bridge has in each of four branches thereof a thermal sensitive device, one pair of such thermal sensitive devices being in thermal contact with an electrode of the active device. Another pair of such thermal sensitive devices is in thermal contact with the substrate. The thermal sensitive devices are resistors. The active device is a transistor. A tuning circuit is coupled to an output of the transistor, such tuning circuit having a tunable element controlled by a control signal fed to such tunable element. A processor is responsive to a voltage produced at an output of the Wheatstone bridge circuit and a signal representative of power fed to the transistor. The output provided by the Wheatstone bridge provides a measure of a temperature difference between the temperature of the transistor and ambient temperature.

Abstract: A limiter circuit includes a rectification circuit coupled to an input of the limiter circuit. The rectification circuit produces a voltage having a predetermined average level. The level is a function of an input signal fed to the input of the limiter circuit. A voltage divider circuit is coupled to the rectification circuit for producing an output voltage having a level proportional to the input signal. An enhancement mode field effect transistor has a gate electrode fed by the output voltage produced by the voltage divider circuit. The transistor has drain and source electrodes coupled to an output of the limiter circuit and a reference potential, respectively. A transmission line is coupled between the input of the limiter and the output of the limiter circuit. The transmission line has an electrical length n&lgr;/4, where &lgr; is the nominal operating wavelength of the limiter circuit and n is an odd integer.

Abstract: A cascode amplifier formed as an integrated circuit on a III-V substrate. The substrate has a pair of elongated active regions formed along a pair of laterally spaced active regions of a surface of the substrate. Each one of the active regions has formed therein a plurality of electrically interconnected transistor cells. The transistor cells in a first one of the active regions are interconnected in a common emitter configuration and the plurality of transistor cells in a second one of the active regions are interconnected in a common base configuration. A plurality of first resistors is disposed over the surface of the substrate, each one of the resistors having a first electrode adapted for coupling to ground potential and a second electrode connected to emitter regions of a corresponding pair of adjacent transistor cells formed in the first one of the regions.

Abstract: A bipolar transistor having a pair of transistor cells formed on a single crystal substrate. Each one of the cells including a collector electrode, an elongated emitter electrode and a base electrode disposed over a first surface of the substrate. The base electrode is adapted to control a flow of carriers between the collector and emitter electrodes. An emitter pad is disposed over the first surface of the substrate. A pair of conductive, air-bridge members is provided. First ends of the bridge members are connected to the emitter pad and second ends of the bridge members are connected along a length of the elongated emitter electrode. The substrate has an emitter contact disposed on a second surface of the substrate. The emitter pad and the emitter contact are electrically connected by an electrically conductive via passing through the substrate between the first and second surfaces of the substrate.

Abstract: A plurality of microwave semiconductor devices is provided by plating a thin heat sink layer on a surface of a wafer of semiconductor material, masking selected portions of the heat sink layer, and plating unmasked portions of the heat sink layer to form a support layer. Substantial portions of the semiconductor material are removed to form a plurality of mesa shaped diodes, at least one semiconductor mesa shaped diode being formed in each region of the semiconductor material disposed on the masked portions of the heat sink layer. Thus each mesa shaped diode, or sets of mesa shaped diodes, has formed on one surface thereof a thin heat sink layer while the mesa shaped diodes are supported by the support layer for subsequent processing. Upper electrodes for the diodes are formed interconnecting the mesa shaped diodes. The individual diodes, or sets thereof, are then separated from the support structure to provide individual single diode, or multiple diode devices.

Abstract: An RF limiter circuit having an input terminal and an output terminal includes an RF propagation network having a first end coupled to the input terminal of the circuit and a second end coupled to the output terminal of the circuit. The RF limiter circuit further includes a plurality of diodes, each diode having an anode and a cathode with the anode of a first one of the diodes coupled to the RF propagation network and the cathode of a second one of the diodes coupled to the RF propagation network. The limiter circuit further includes a bias network for distributing a reverse bias voltage across each of the plurality of diodes and for providing a DC voltage on said RF propagation network.

Abstract: A heterojunction bipolar, push-pull transistor includes a substrate, a first bipolar transistor region including a first collector layer, a first base layer and a first emitter layer disposed over said substrate and a second bipolar transistor region including a second collector layer, a second base layer and a second emitter layer disposed over said first bipolar transistor region. The transistor further includes a first base electrode coupled to said first and second base layers, a first emitter electrode coupled to said first and second emitter layers, and a first collector electrode coupled to said second collector layer.

Abstract: A heterojunction bipolar transistor for high power applications in the microwave and millimeter wave regions is described. The heterojunction bipolar transistor includes a substrate having disposed thereover an emitter layer comprised of doped aluminum gallium arsenide and a composite base layer including a first layer of doped gallium arsenide disposed on the emitter to form a heterojunction. A second layer of doped indium gallium arsenide is disposed on the first base layer to provide a composite base. Disposed over the indium gallium arsenide layer is a gallium arsenide layer which acts as the collector. When etching the gallium arsenide layer to define the collector, the indium gallium arsenide layer acts as an etch stop to protect the underlying gallium arsenide layer and provide a smooth bath region to form base contacts.

Abstract: A plurality of microwave semiconductor devices is provided by plating a thin heat sink layer on a surface of a wafer of semiconductor material, masking selected portions of the heat sink layer, and plating unmasked portions of the heat sink layer to form a support layer. Substantial portions of the semiconductor material are removed to form a plurality of mesa shaped diodes, at least one semiconductor mesa shaped diode being formed in each region of the semiconductor material disposed on the masked portions of the heat sink layer. Thus each mesa shaped diode, or sets of mesa shaped diodes, has formed on one surface thereof a thin heat sink layer while the mesa shaped diodes are supported by the support layer for subsequent processing. Upper electrodes for the diodes are formed interconnecting the mesa shaped diodes. The individual diodes, or sets thereof, are then separated from the support structure to provide individual single diode, or multiple diode devices.

Abstract: A method for forming a protective layer from surface portions of a mesa-shaped semiconductor to electrically isolate a junction region formed within the semiconductor from external contaminants. A top contact electrode is formed on an upper surface of a substrate. An active region, having formed therein the junction, is formed on the bottom portion of the substrate. A support is then formed on the active region. The top contact is first used as an etching mask, and a chemical etchant is brought into contact with unmasked portions of the substrate to form a mesa-shaped structure with divergent side walls. The divergent side walls have bottom portions which include the active region and which extend beyond the periphery of the top contact electrode. The top contact is next used as an implant mask and particles are implanted in exposed portions of the side walls extending beyond the periphery of the top contact electrode to convert the exposed semiconductor material into the protective layer.

Abstract: A semiconductor device having an improved non-diffusive Schottky-barrier junction and metallization layers and method for producing the same. A thin layer of a Schottky-barrier forming metal such as platinum is sputter deposited upon a hot gallium arsenide substrate, thereby impact alloying a portion of the Schottky-barrier forming metal with the gallium arsenide material. A refractive metal such as titanium is then sputtered above the Schottky-barrier forming layer at a power level sufficient to alloy the remaining Schottky-barrier forming metal with the refractive metal. A highly conductive layer such as gold is then sputter deposited over the refractive layer to provide ohmic contact. The invention may be used to particular advantage in microwave diode and field effect transistor devices.

Abstract: A semiconductor device having an improved non-diffusive Schottky-barrier junction and metallization layers and method for producing the same. A thin layer of a Schottky-barrier forming metal such as platinum is sputter deposited upon a hot gallium arsenide substrate impact alloying a portion of the Schottky-barrier forming metal with the gallium arsenide material. A refractive metal such as titanium is then sputtered above the Schottky-barrier forming layer at a power level sufficient to alloy the remaining Schottky-barrier forming metal with the refractive metal. A highly conductive layer such as gold is then sputter deposited over the refractive layer to provide ohmic contact. The invention may be used to particular advantage in microwave diode and field effect transistor devices.

Abstract: A microwave semiconductor device with improved thermal properties is disclosed wherein multiple active semiconductor bodies are disposed between two electrically and thermally isolated heat sinks. Two separate thermal paths are provided for heat produced within the semiconductor material. The maximum operating power of devices such as double-drift IMPATT diodes is greatly extended.

Abstract: A method is disclosed for dicing individual or groups of diode mesas fabricated upon a single metal heat sink. The undiced device is placed diode mesas down upon a transparent glass plate with the mesas protected in wax. A first mask is positioned upon the opposite side of the plate by alignment with the diode mesas as seen through the plate. Portions of the first mask extend on the plate beyond the edges of the wax and heat sink. A second etching mask is then fabricated upon the bottom of the heat sink by exposing a layer of photoresist through a mask having the same grid pattern as the first mask and which is aligned with the portions of the first mask seen through the glass plate beyond the edge of the heat sink. The diode mesas are etched apart by spraying an appropriate etchant through apertures in the etching mask.