Patents by Inventor Michael G. Amaro

Michael G. Amaro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8304868
    Abstract: A pallet (501) supporting a half-etched leadframe with cantilever-type leads (403) without metallic supports during the step of attaching components (510) to the leads in order to assemble an electronic system. After assembly, the pallet is removed before the molding step that encapsulates (601a) the components on the leadframe and mechanically supports (601b) the cantilever leads. The pallet is machined from metal or inert plastic material, tolerates elevated temperatures during soldering, and is reusable for the next assembly batch.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Michael G Amaro, Steven A Kummerl, Taylor R Efland, Sreenivasan K Koduri
  • Patent number: 8217674
    Abstract: Open and short systems and methods for testing integrated circuits are disclosed. An example implementation includes engaging an integrated circuit testing module with an integrated circuit testing apparatus, the integrated circuit testing module for receiving an integrated circuit, a first set of contact points, and a second set of contact points; engaging a first probe onto at least one of the contact points of the first set of contact points, controllably engaging at least one of a second probe onto at least one contact pair of the integrated circuit testing module, and providing an electrical stimulus to the integrated circuit testing module.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: July 10, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Michael G. Amaro, Yuwei Luo, John M. Bonfitto, Michael J. Kane
  • Publication number: 20120086112
    Abstract: A pallet (501) supporting a half-etched leadframe with cantilever-type leads (403) without metallic supports during the step of attaching components (510) to the leads in order to assemble an electronic system. After assembly, the pallet is removed before the molding step that encapsulates (601a) the components on the leadframe and mechanically supports (601b) the cantilever leads. The pallet is machined from metal or inert plastic material, tolerates elevated temperatures during soldering, and is reusable for the next assembly batch.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 12, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Michael G. Amaro, Steven A. Kummerl, Taylor R. Efland, Sreenivasan K. Koduri
  • Publication number: 20110193581
    Abstract: Open and short systems and methods for testing integrated circuits are disclosed. An example implementation includes engaging an integrated circuit testing module with an integrated circuit testing apparatus, the integrated circuit testing module for receiving an integrated circuit, a first set of contact points, and a second set of contact points; engaging a first probe onto at least one of the contact points of the first set of contact points, controllably engaging at least one of a second probe onto at least one contact pair of the integrated circuit testing module, and providing an electrical stimulus to the integrated circuit testing module.
    Type: Application
    Filed: February 8, 2010
    Publication date: August 11, 2011
    Inventors: Michael G. Amaro, Yuwei Luo, John M. Bonfitto, Michael J. Kane
  • Publication number: 20100188015
    Abstract: An apparatus to power and dim LEDs is provided. The apparatus generally comprises a boost converter having an output node, a regulator node, a sensing network, and an impedance network. LEDs, which are coupled in series with one another, are coupled between the output node and the impedance network of the boost converter. A zener diode is coupled to the output node and coupled to the sensing network, and a dimming circuit is coupled to the boost converter. The dimming circuit includes a diode coupled to the impedance network, a switch coupled between the diodes and ground (which receives the signal for dimming the plurality of LEDs), and a network coupled to the regulator node and to the node between the second diode and the second switch.
    Type: Application
    Filed: January 27, 2009
    Publication date: July 29, 2010
    Applicant: Texas Instruments Incorporation
    Inventors: Roman Korsunsky, Ching-Yao Hung, Rama Venkatraman, Michael G. Amaro
  • Publication number: 20080232146
    Abstract: Various embodiments of the present invention provide rectifier controllers, power supplies and methods for operating such. As one example, a rectifier controller circuit is disclosed that includes a transistor, a phase locked loop circuit, a period counter and a combinational logic circuit. One leg of the transistor is electrically coupled to a switch node of a power supply, and is in parallel to a diode of the power supply. The phase locked loop circuit receives a signal representing a voltage at the switch node, and is operable to synchronize to a period of the signal representing the voltage at the switch node. The period counter divides the period of the signal representing the voltage at the switch node into segments.
    Type: Application
    Filed: January 23, 2008
    Publication date: September 25, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Ted Thomas, Roman Korsunsky, Michael G. Amaro
  • Patent number: 7224153
    Abstract: A power regulator has an output for regulated power that is connected to supply power to a load. The load can have various electrical characteristics, including requiring a rapid transient response. The transient response amplitude for the power regulator is decreased by adding capacitance at the output, but that slows the response time of the power regulator by lowering the crossover frequency and the phase margin at the crossover frequency. An adjustable gain element imbedded in the feedback network provides an input to permit a builder or user of the power regulator to vary the effective value of impedance elements in the feedback network. The builder or user selectively connects an impedance to the input of the adjustable gain element to thereby adjust the frequency characteristics of the feedback network to thereby adjust output characteristics of the power regulator to compensate for the effects of capacitance added to the power regulator output.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: May 29, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Charles Allen DeVries, Jr., Joseph Gerard Renauer, Michael G. Amaro
  • Patent number: 7023005
    Abstract: A feedback circuit has an optical coupler with a feedback gain control. The feedback gain control includes an active element connected to vary current flow depending on changes in gain of the optical coupler.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: April 4, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: David A. Williams, Michael G. Amaro
  • Patent number: 6881100
    Abstract: A socket for receiving a line of contact pins is formed of modules connected together. The modules have three, four or five pin receiving openings and are joined to one another by dovetail connectors to form an elongated body having the desired number of pin receiving openings. Contacts are provided in the pin receiving openings to electrically connect with the pins. The modules have a ledge on which rests a work surface.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: April 19, 2005
    Assignee: Texas Instruments Incorporation
    Inventors: John Brett Barry, Michael G. Amaro, Mark Daniel Fleszewski
  • Publication number: 20040072472
    Abstract: A socket for receiving a line of contact pins is formed of modules connected together. The modules have three, four or five pin receiving openings and are joined to one another by dovetail connectors to form an elongated body having the desired number of pin receiving openings. Contacts are provided in the pin receiving openings to electrically connect with the pins. The modules have a ledge on which rests a work surface.
    Type: Application
    Filed: October 15, 2002
    Publication date: April 15, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: John Brett Barry, Michael G. Amaro, Mark Daniel Fleszewski
  • Publication number: 20040023562
    Abstract: A contact for a pin receiving socket includes, in order, a top flange, an angled pin guiding portion, a first contact point, a recess, a second contact point, a flex shaft, an anchor portion, and an external connection portion. The contact, and preferably two identical contacts, is mounted in a pin receiving opening of a socket body. The anchor portion is secured in the socket body at the bottom of the pin receiving opening, and the external connection portion extends through and out of the socket body. When a pin is inserted, the first contact point rubs or wipes any debris or contaminants from the pin and the second contact point makes and electrical connection to the cleaned part of the pin.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 5, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: John Brett Barry, Michael G. Amaro, Mark Daniel Fleszewski, Jeffrey T. Bellandi
  • Publication number: 20030117698
    Abstract: A feedback circuit has an optical coupler with a feedback gain control. The feedback gain control includes an active element connected to vary current flow depending on changes in gain of the optical coupler.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Inventors: David A. Williams, Michael G. Amaro
  • Patent number: 6222745
    Abstract: A DC to DC converter includes multiple stages to share power handling. The stages are connected in parallel paths between the source input and the load output of the power converter. An analog error signal is generated by comparing the load output signal to a reference signal. The error signal is fed to a phase shifting input of a phase lock loop. The phase lock loop is connected to receive a reference clock signal and maintain a relative clock signal shifted in phase from the reference clock signal by an amount depending on the error signal. Digital divider circuits and digital logic circuits are used to produce phase shifted variable pulse width control signals for the stages. The parallel connected power conversion stages equally share the transfer of power from the input source to an output load. A single analog to digital conversion of a single analog error signal to multiple, phase shifted, variable duty cycle clocks is provided.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: April 24, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Michael G. Amaro, Joseph G. Renauer
  • Patent number: 5883797
    Abstract: A power conversion architecture includes one control capable of simultaneous operation with multiple power conversion circuits. The function of the controlling mechanism includes an output signal proportional to one or more inputs to the controlling mechanism for the purpose of maintaining a destination level at a substantially constant value. The function of each power conversion path is to transfer power from a source to a destination in an amount dictated by the controlling mechanism. The function of the parallel power conversion architecture is to proportionally distribute the power transfer between all power conversion paths.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: March 16, 1999
    Assignee: Power Trends, Inc.
    Inventors: Michael G. Amaro, Joseph G. Renauer
  • Patent number: 4852145
    Abstract: A method of locating faults in a telephone system including the steps of connecting antiparallel rectifying switches (ARS's ) that inhibit alternating current (A.C.) flow in one direction but not the other between subscriber equipment and respective telephone company lines, applying an A.C. test signal to a telephone company line and measuring a resulting signal, and determining whether a fault is on the telephone company line or customer equipment based upon the resulting signal. Also disclosed is an ARS that includes a first input and output, a second input and output, and paths between respective inputs and outputs providing low turn-on thresholds in one direction between respective inputs and outputs and high turn-on thresholds in the other direction, the directions of low and high being the same for both sets of inputs and outputs.
    Type: Grant
    Filed: July 22, 1988
    Date of Patent: July 25, 1989
    Assignee: Teradyne, Inc.
    Inventors: Morey S. Bevers, Michael G. Amaro, Robert A. Musson