Patents by Inventor Michael Günther
Michael Günther has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9630379Abstract: Laminated composite (10) comprising at least one electronic substrate (11) and an arrangement of layers (20, 30) made up of at least a first layer (20) of a first metal and/or a first metal alloy and of a second layer (30) of a second metal and/or a second metal alloy adjacent to this first layer (20), wherein the melting temperatures of the first and second layers are different, and wherein, after a thermal treatment of the arrangement of layers (20, 30), a region with at least one intermetallic phase (40) is formed between the first layer and the second layer, wherein the first layer (20) or the second layer (30) is formed by a reaction solder which consists of a mixture of a basic solder with an AgX, CuX or NiX alloy, wherein the component X of the AgX, CuX or NiX alloy is selected from the group consisting of B, Mg, Al, Si, Ca, Se, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Ag, In, Sn, Sb, Ba, Hf, Ta, W, Au, Bi, La, Ce, Pr, Nd, Gd, Dy, Sm, Er, Tb, Eu, Ho, Tm, Yb and Lu and wherein the meltiType: GrantFiled: September 21, 2012Date of Patent: April 25, 2017Assignee: Robert Bosch GmbHInventors: Thomas Kalich, Christiane Frueh, Franz Wetzl, Bernd Hohenberger, Rainer Holz, Andreas Fix, Michael Guyenot, Andrea Feiock, Michael Guenther, Martin Rittner
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Publication number: 20170069608Abstract: A commutation cell having at least one electrical capacitor, at least one controllable semiconductor switch and at least one semiconductor which is connected in series with the controllable semiconductor switch. The commutation cell has three circuit substrates situated in parallel with one another. The controllable semiconductor switch is connected in series with the semiconductor via a circuit substrate situated partially between the controllable semiconductor switch and the semiconductor, and the two remaining circuit substrates being connected to one another in an electrically conductive manner via a subassembly made up of the controllable semiconductor switch, the semiconductor and the circuit substrate situated partially between the controllable semiconductor switch and the semiconductor, the electrical capacitor being switched between the two remaining circuit substrates, separately from the subassembly.Type: ApplicationFiled: April 21, 2015Publication date: March 9, 2017Applicant: Robert Bosch GmbHInventors: Walter Daves, Knut Alexander Kasper, Martin Rittner, Silvia Duernsteiner, Michael Guenther
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Patent number: 9537070Abstract: An optoelectronic component contains a semiconductor chip (1) and a carrier body (10), which are provided with a transparent, electrically insulating encapsulation layer (3), the encapsulation layer (3) having two cutouts (11, 12) for uncovering a contact area (6) and a connection region (8) of the carrier body, and an electrically conductive layer (14) being led from the contact area (6) over a partial region of the encapsulation layer (3) to the electrical connection region (8) of the carrier body (10) in order to electrically connect the contact area (6) and the electrical connection region (8) to one another. The radiation emitted in a main radiation direction (13) by the semiconductor chip (1) is coupled out through the encapsulation layer (3), which advantageously contains luminescence conversion substances for the wavelength conversion of the emitted radiation.Type: GrantFiled: September 13, 2005Date of Patent: January 3, 2017Assignee: OSRAM Opto Semiconductors GmbHInventors: Ewald Karl Michael Guenther, Jörg Erich Sorg, Norbert Stath
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Patent number: 9502634Abstract: An electrically conductive contact layer (4) is provided with a joining material (9) during a method for producing a piezoelectric component (1), in particular a piezoelectric sensor (1). To this end, the electrically conductive contact layer (4) can be dipped into a paste that serves to form the joining material (9). The contact layer (4) provided with the joining material (9) is subsequently disposed between a first piezoceramic layer (2) and a second piezoceramic layer (3). The contact layer (4) is then inserted via the joining material (9) between the first piezoceramic layer (2) and the second piezoceramic layer (3), wherein a pressure is applied to the first piezocermaic layer (2) against the second piezoceramic layer (3).Type: GrantFiled: January 10, 2014Date of Patent: November 22, 2016Assignee: Robert Bosch GmbHInventors: Reinhold Melcher, Michael Guenther
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Publication number: 20150306669Abstract: The invention relates to a method for connecting at least two components (18, 20) using a sintering process. The aim of the invention is to improve the sintering process.Type: ApplicationFiled: October 9, 2013Publication date: October 29, 2015Applicant: Robert Bosch GmbHInventors: Michael Guenther, Andrea Feiock
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Publication number: 20150123263Abstract: The invention relates to a method for joining a semiconductor (20) to a substrate (10), comprising the following steps: •applying a first paste layer (1) of a sintering paste to the substrate; •heating and compressing the first paste layer to form a first sintered layer; •applying a second paste layer (2) of a sintering paste to the first sintered layer and arranging a semiconductor (20) on the second paste layer; •heating and compressing the second paste layer (2) to form a second sintered layer. The invention further relates to a semiconductor component produced by means of the method.Type: ApplicationFiled: April 2, 2013Publication date: May 7, 2015Inventors: Christiane Frueh, Michael Guenther, Thomas Herboth
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Patent number: 8900894Abstract: In a method for producing a radiation-emitting optoelectronic component, a semiconductor chip is mounted by a first main area onto a carrier body and is electrically conductively connected at a first contact area to a first connection region, and a transparent electrically insulating encapsulation layer is applied to the chip and the carrier body. A first cutout in the encapsulation layer for at least partly uncovering a second contact area of the chip is produced, and a second cutout in the encapsulation layer for at least partly uncovering a second connection region of the carrier body is produced. Finally, an electrically conductive layer, which electrically conductively connects the second contact area of the semiconductor chip and the second connection region of the carrier body, is applied.Type: GrantFiled: August 28, 2012Date of Patent: December 2, 2014Assignee: OSRAM Opto Semiconductor GmbHInventors: Ewald Karl Michael Guenther, Jörg Erich Sorg, Norbert Stath
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Patent number: 8853732Abstract: The invention relates to an optoelectronic component, having —a carrier (1) comprising a first main surface (Ia), —at least one optoelectronic semiconductor chip (2) having no substrate, and —a contact metallization (3a, 3b), wherein —the carrier (1) is electrically insulating, —the at least one optoelectronic semiconductor chip (2) is fastened to the first main surface (Ia) of the carrier (1) by means of a bonding material (4), particularly a solder material, —the contact metallization (3a, 3b) covers at least one area of the first main surface (Ia) free of the optoelectronic semiconductor chip (2), and —the contact metallization (3a, 3b) is electrically conductively connected to the optoelectronic semiconductor chip (2).Type: GrantFiled: August 31, 2010Date of Patent: October 7, 2014Assignee: OSRAM Opto Semiconductors GmbHInventors: Klaus Müller, Günter Spath, Siegfried Herrmann, Ewald Karl Michael Günther, Herbert Brunner
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Publication number: 20140248505Abstract: Laminated composite (10) comprising at least one electronic substrate (11) and an arrangement of layers (20, 30) made up of at least a first layer (20) of a first metal and/or a first metal alloy and of a second layer (30) of a second metal and/or a second metal alloy adjacent to this first layer (20), wherein the melting temperatures of the first and second layers are different, and wherein, after a thermal treatment of the arrangement of layers (20, 30), a region with at least one intermetallic phase (40) is formed between the first layer and the second layer, wherein the first layer (20) or the second layer (30) is formed by a reaction solder which consists of a mixture of a basic solder with an AgX, CuX or NiX alloy, wherein the component X of the AgX, CuX or NiX alloy is selected from the group consisting of B, Mg, Al, Si, Ca, Se, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Ag, In, Sn, Sb, Ba, Hf, Ta, W, Au, Bi, La, Ce, Pr, Nd, Gd, Dy, Sm, Er, Tb, Eu, Ho, Tm, Yb and Lu and wherein the meltiType: ApplicationFiled: September 21, 2012Publication date: September 4, 2014Inventors: Thomas Kalich, Christiane Frueh, Franz Wetzl, Bernd Hohenberger, Rainer Holz, Andreas Fix, Michael Guyenot, Andrea Feiock, Michael Guenther, Martin Rittner
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Publication number: 20140234649Abstract: The invention relates to a layered composite (10), in particular for connecting electronic components as joining partners, comprising at least one substrate film (11) and a layer assembly (12) applied to the substrate film. The layer assembly comprises at least one sinterable layer (13), which is applied to the substrate film (11) and which contains at least one metal powder, and a solder layer (14) applied to the sinterable layer (13). The invention further relates to a method for forming a layered composite, to a circuit assembly containing a layered composite (10) according to the invention, and to the use of a layered composite (10) in a joining method for electronic components.Type: ApplicationFiled: September 21, 2012Publication date: August 21, 2014Inventors: Thomas Kalich, Frank Wetzl, Bernd Hohenberger, Rainer Holz, Christiane Frueh, Andreas Fix, Michael Guyenot, Andrea Feiock, Martin Rittner, Michael Guenther
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Publication number: 20140225274Abstract: A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge.Type: ApplicationFiled: June 26, 2012Publication date: August 14, 2014Inventors: Michael Guyenot, Michael Guenther, Thomas Herboth
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Publication number: 20140191620Abstract: An electrically conductive contact layer (4) is provided with a joining material (9) during a method for producing a piezoelectric component (1), in particular a piezoelectric sensor (1). To this end, the electrically conductive contact layer (4) can be dipped into a paste that serves to form the joining material (9). The contact layer (4) provided with the joining material (9) is subsequently disposed between a first piezoceramic layer (2) and a second piezoceramic layer (3). The contact layer (4) is then inserted via the joining material (9) between the first piezoceramic layer (2) and the second piezoceramic layer (3), wherein a pressure is applied to the first piezocermaic layer (2) against the second piezoceramic layer (3).Type: ApplicationFiled: January 10, 2014Publication date: July 10, 2014Inventors: Reinhold Melcher, Michael Guenther
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Patent number: 8733950Abstract: An LED projector includes a plurality of light sources; and an image generator which includes an arrangement of pixels, each pixel including at least one light source; wherein the LEDs are stacked epi-LEDs which include layers arranged above one another for different colors, or each pixel includes an emission surface and at least two LEDs are arranged adjacent one another in the emission surface.Type: GrantFiled: September 9, 2009Date of Patent: May 27, 2014Assignee: OSRAM Opto Semiconductors GmbHInventors: Stefan Grötsch, Ewald Karl Michael Günther, Alexander Wilm, Siegfried Herrmann
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Patent number: 8730676Abstract: A composite component includes a first joining partner, at least one second joining partner and a first joining layer situated between the first joining partner and the second joining partner. In addition to the first joining layer, at least one second joining layer is provided between the first and the second joining partner; and at least one intermediate layer is situated between the first and the second joining layer.Type: GrantFiled: January 25, 2010Date of Patent: May 20, 2014Assignee: Robert Bosch GmbHInventors: Michele Hirsch, Michael Guenther
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Publication number: 20140008770Abstract: A carrier substrate includes a first major face and a second major face opposite the first major face. A diode structure is formed between the first major face and the second major face, which diode structure electrically insulates the first major face from the second major face at least with regard to one polarity of an electrical voltage.Type: ApplicationFiled: February 7, 2012Publication date: January 9, 2014Applicant: OSRAM Opto Semiconductors GmbHInventors: Ewald Karl Michael Günther, Andreas Plößl, Heribert Zull, Thomas Veit, Mathias Kämpf, Jens Dennemarck, Bernd Böhm, Korbinian Perzlmaier
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Patent number: 8581279Abstract: In a luminescence diode chip having a radiation exit area (1) and a contact structure (2, 3, 4) which is arranged on the radiation exit area (1) and comprises a bonding pad (4) and a plurality of contact webs (2, 3) which are provided for current expansion and are electrically conductively connected to the bonding pad (4), the bonding pad (4) is arranged in an edge region of the radiation exit area (1). The luminescence diode chip has reduced absorption of the emitted radiation (23) in the contact structure (2, 3, 4).Type: GrantFiled: June 2, 2006Date of Patent: November 12, 2013Assignee: OSRAM Opto Semiconductors GmbHInventors: Johannes Baur, Volker Härle, Berthold Hahn, Andreas Weimar, Raimund Oberschmid, Ewald Karl Michael Guenther, Franz Eberhard, Markus Richter, Jörg Strauss
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Patent number: 8562142Abstract: A multicolour LED, in which layers for generating light of different colors are arranged one above the other, is used as the light source in a projector.Type: GrantFiled: May 4, 2009Date of Patent: October 22, 2013Assignee: OSRAM Opto Semiconductors GmbHInventors: Stefan Groetsch, Ewald Karl Michael Guenther, Alexander Wilm, Siegfried Herrmann
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Publication number: 20120322178Abstract: In a method for producing a radiation-emitting optoelectronic component, a semiconductor chip is mounted by a first main area onto a carrier body and is electrically conductively connected at a first contact area to a first connection region, and a transparent electrically insulating encapsulation layer is applied to the chip and the carrier body. A first cutout in the encapsulation layer for at least partly uncovering a second contact area of the chip is produced, and a second cutout in the encapsulation layer for at least partly uncovering a second connection region of the carrier body is produced. Finally, an electrically conductive layer, which electrically conductively connects the second contact area of the semiconductor chip and the second connection region of the carrier body, is applied.Type: ApplicationFiled: August 28, 2012Publication date: December 20, 2012Applicant: Osram Opto Semiconductors GmbHInventors: Ewald Karl Michael Guenther, Jörg Erich Sorg, Norbert Stath
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Publication number: 20120248492Abstract: The invention relates to an optoelectronic component, having —a carrier (1) comprising a first main surface (Ia), —at least one optoelectronic semiconductor chip (2) having no substrate, and —a contact metallization (3a, 3b), wherein —the carrier (1) is electrically insulating, —the at least one optoelectronic semiconductor chip (2) is fastened to the first main surface (Ia) of the carrier (1) by means of a bonding material (4), particularly a solder material, —the contact metallization (3a, 3b) covers at least one area of the first main surface (Ia) free of the optoelectronic semiconductor chip (2), and —the contact metallization (3a, 3b) is electrically conductively connected to the optoelectronic semiconductor chip (2).Type: ApplicationFiled: August 31, 2010Publication date: October 4, 2012Applicant: Osram Opto Semiconductors GmbHInventors: Klaus Müller, Günter Spath, Siegfried Herrmann, Ewald Karl Michael Günther, Herbert Brunner
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Publication number: 20120028025Abstract: The invention relates to an electrical and electronic composite component (1), comprising a first joining partner (2) and at least one second joining partner (3). The invention provides for an openly porous sintered shaped part (6, 7) to be accommodated between the first and the second joining partners (2, 3), said sintered shaped part being sintered by sintering by means of sintering paste with the first and the second joining partners (2, 3). The invention furthermore relates to a production method.Type: ApplicationFiled: December 18, 2009Publication date: February 2, 2012Applicants: SIEMENS AKTIENGESELLSCHAFT, ROBERT BOSCH GMBHInventors: Daniel Wolde-Giorgis, Erik Sueske, Martin Rittner, Erik Peter, Herbert Schwarzbauer, Michael Guenther