Abstract: A system and method can be used for scaling an output of a modulator of a sigma-delta analog to digital converter and systems and a method can be used for compensating temperature-dependent variations of a reference voltage in a sigma-delta analog to digital converter. In accordance with one embodiment, a system can be used for scaling an output of a modulator of a sigma-delta analog digital converter (ADC). A decimation filter has a decimation length that is adjustable by a decimation length value received as an input to the decimation filter. The decimation filter is configured to receive the output of the modulator of the sigma-delta ADC and to decimate the received output of the modulator of the sigma-delta ADC using the received decimation length value.

Abstract: A system includes a bus system to connect a number of components in a chain-like structure. A first control device (e.g., microcontroller or microprocessor) is configured to control the components in a first mode of the system. A second control device (e.g., microcontroller or microprocessor) is configured to control a first subset of the components in a second mode of the system.

Abstract: The invention relates to an electrical or electronic system, and more specifically, to a system with a bus, and a method to transmit data, in particular error data over a bus system. According to an embodiment, a method to transmit error data over a bus system that connects a plurality of modules/components/elements of an electronic system in a chain-like structure comprises in a first phase, transmitting information regarding what kinds of errors have occurred in the system, and in a second phase, transmitting information regarding where in the system an error has occurred.

Abstract: A flyback converter includes input terminals and output terminals. A transformer with a first winding and a second winding are inductively coupled. A first switching element is connected in series with the first winding and a first series circuit with the first switching element, the first winding being coupled between the input terminals. A rectifier arrangement is connected in series with the second winding and a second series circuit with the rectifier arrangement, the second winding being coupled between the output terminals. The rectifier arrangement includes a second switching element. A control circuit is configured in one drive cycle to switch on the first switching element for a first time period. After the first time period the second switching element is switched on for a second time period. A third time period is determined between an end of the second time period and the time at which the transformer assumes a predetermined transformer state.

Abstract: A current regulator and a method for regulating current are described.

Abstract: A method detects a short circuit in a load current path that includes an inductive load.

Abstract: An integrated circuit and a method for operating an integrated circuit is disclosed. One embodiment provides a semi-conductor component, an electronic system, and a method for operating an integrated circuit. A method for operating an integrated circuit provides applying a voltage to a line or a connection in accordance with data to be input. A current is applied to the line or the connection in accordance with data to be output.

Abstract: The present invention relates to a method and a device for the detection of at least one property of at least one object. The detection is effected by means of a microchip. The microchip has at least one readable detection pixel. In order to reduce the technical equipment outlay during object detection, the method according to the invention is characterized by the fact that the at least one object is arranged at the microchip in a spatially predetermineable position. The at least one object is exposed to illumination light in order to detect the illumination light that interacts with the at least one object or the light that is induced by the illumination light and emerges from the at least one object by means of the at least one readable detection pixel of the microchip.

Abstract: A current regulator and a method for regulating current are described.

Abstract: An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller.

Abstract: An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller.

Abstract: An integrated circuit and a method for operating an integrated circuit is disclosed. One embodiment provides a semi-conductor component, an electronic system, and a method for operating an integrated circuit. A method for operating an integrated circuit provides applying a voltage to a line or a connection in accordance with data to be input. A current is applied to the line or the connection in accordance with data to be output.

Abstract: The method for the microscopic localization in situ of a selected intracellular native genome segment with a known nucleotide sequence is characterized by the nature and the sequence of the following measures: (1.) The target DNA is analyzed, via genome databases, for partial sequences which constitute a unique pattern within the genome. (2.) Single-stranded probe sequences are provided which are identical to these partial sequences or complementary thereto, and which are suitable for hybridizing with the single strands of these subsequences via a Watson-Crick binding. (3.) The probe sequences are coupled with marker molecules, where all units of probe sequence and marker molecule(s) have the same binding behavior or the same melting point as the single strand of the target DNA complementary thereto. (4.

Abstract: A method and integrated circuit for the transmission of differential signals with a signal and a complementary signal is disclosed. For trimming the edge steepness of the signal with that of the complementary signal, the integrated circuit has a first driver for generating the signal, and a second driver for generating the complementary signal. A circuit is provided, configured to control the edge steepness of the signal or of the complementary signal.

Abstract: Embodiments of the invention provide a memory arrangement having an even number k=4 of physically spaced RAM chips, on each of which it is possible for m data items to be simultaneously written or read via an m-bit data bus, also having a register for buffer-storing and transmitting n respective parallel data bits as a packet between an n-bit parallel port and the data buses, and having a selection device which responds to selection bits in order to select a respective separate cell group within the plurality of the chips for each of the disjoint m-bit groups (d) of the n-bit packet. The k chips are classified into q=2 disjoint chip groups, each of which comprises k/q chips which differ as little as possible from one another in terms of their distance from the register. The number m is chosen to be equal to q*n/k, and the selection device is designed to select a respective separate chip from the same chip group and a cell group in this chip for each m-bit group of the same n-bit packet.

Abstract: The present invention relates to two new wave field microscopes, type I and type II, which are distinguished by the fact that they each have an illumination and excitation system, which include at least one real and one virtual illumination source, and at least one objective lens (in the case of type II), i.e., two objective lenses (in the case of type I), with the illumination sources and objective lenses being so positioned with respect to one another that they are suited for generating one-, two-, and three-dimensional standing wave fields in the object space. The calibration method in accordance with the present invention is adapted to this wave field microscopy and permits geometric distance measurements between fluorochrome-labeled object structures, whose distance can be less than the width at half maximum intensity of the effective point spread function. The invention relates moreover to a method of wave-field microscopic DNA sequencing.

Abstract: A method and integrated circuit for the transmission of differential signals with a signal and a complementary signal is disclosed. For trimming the edge steepness of the signal with that of the complementary signal, the integrated circuit has a first driver for generating the signal, and a second driver for generating the complementary signal. A circuit is provided, configured to control the edge steepness of the signal or of the complementary signal.

Abstract: A method and circuit for refreshing dynamic memory cells arranged along word lines and bit lines are provided, the memory cells being refreshed in a manner dependent on a refresh signal with a refresh frequency by the activation of the word line in order to write the information back to the memory cells arranged on the relevant word line, in which case the refresh frequency is set in a manner dependent on the charge loss of first dummy memory cells during a refresh period of the refresh signal on a first dummy word line and/or in a manner dependent on the charge loss of second dummy memory cells during the refresh period of the refresh signal on a second dummy word line.

Abstract: Embodiments of the invention provide a memory arrangement having an even number k=4 of physically spaced RAM chips, on each of which it is possible for m data items to be simultaneously written or read via an m-bit data bus, also having a register for buffer-storing and transmitting n respective parallel data bits as a packet between an n-bit parallel port and the data buses, and having a selection device which responds to selection bits in order to select a respective separate cell group within the plurality of the chips for each of the disjoint m-bit groups (d) of the n-bit packet. The k chips are classified into q=2 disjoint chip groups, each of which comprises k/q chips which differ as little as possible from one another in terms of their distance from the register. The number m is chosen to be equal to q*n/k, and the selection device is designed to select a respective separate chip from the same chip group and a cell group in this chip for each m-bit group of the same n-bit packet.

Abstract: Circuit arrangement for determining the load current through an inductive load (L) connected to a supply voltage (Vbat) in a clocked manner includes a current measuring impedance (30) which can be connected in series with the inductive load (L), a first and second connecting terminal (31, 32), a measuring amplifier (20) having a first and second input (21, 22) and an output (23), and a level shifter arrangement (40) having first and second inputs (41, 42) and first and second outputs (43, 44) The arrangement is designed to map a potential present at the first input terminal (41) onto a potential shifted by a predetermined potential value at the first output terminal (43) and to map a potential present at the second input terminal (42) onto a potential shifted by a predetermined potential value at the second output terminal (44).