Abstract: Field device for determining or monitoring a physical or chemical process variable, wherein the field device is composed of a sensor, which works according to a defined measuring principle, and a control/evaluation unit, which, as a function of a safety standard required for the particular safety-critical application, conditions and evaluates, along at least two equivalent measuring paths, measurement data delivered by the sensor. The control/evaluation unit is implemented on an FPGA, on which are provided at least a first section and a second section, wherein, in each section, a digital measuring path, which is composed of a plurality of software-based and/or hardware-based function modules, is dynamically reconfigurable.

Abstract: A field device for determining or monitoring a physical or chemical variable, comprising a sensor, which works according to a defined measuring principle, and a control/evaluation unit, which, as a function of a required safety standard for a particular safety-critical application, conditions and evaluates along at least two equivalent measuring paths measurement data delivered by the sensor. The control/evaluation unit is implemented on an application-specific integrated circuit—an ASIC—which, in at least a first section and in a second section, is embodied as a dynamically reconfigurable logic chip. In each of the two sections, in each case, a measuring path composed of a plurality of function modules can be configured; wherein the individual sections are spaced apart from one another in such a manner, that a temperature and/or a voltage change in one of the sections has no influence on the other section or the other sections.

Abstract: A configurable field device for automation technology with a partially dynamically reconfigurable logic chip FPGA, in which function modules are dynamically configured during runtime, and to a method for operating the configurable field device.

Abstract: A system for the flexible configuration of function modules. The system includes the following components a plurality of logic cells in a fixedly wired FPGA/standard ASIC structure, wherein the logic cells are so configurable by means of configuration registers, that they execute basic logic functions; a switch matrix having a plurality of memory cells, via which different logical connections of the logic cells in defined complex connections are configurable by means of the configuration registers; and a control unit, which partially dynamically so configures the logic cells and the switch matrix via an internal bus and via the configuration registers by means of a configuration bit stream, that the fixedly wired FPGA/ASIC structure behaves functionally as a partially dynamically reconfigurable logic chip.

Abstract: The apparatus enables the automated testing, calibration and characterization of test adapters for semiconductor devices. A holder for the test adapter can be rotated in a defined manner. At least one probe head is provided which can be adjusted radially with respect to the holder. The probe head has two or more contact pins whose spacing distance is adjustable.

Abstract: A method for rewiring contact pads in the wafer-level package is inventively provided. In order to be able to make the terminals of the characterization pads available for testing in a wafer-level package without these terminals being available later to the end user, the invention provides that the rewiring line is led via the scribe line of the wafer.

Abstract: The apparatus enables the automated testing, calibration and characterization of test adapters for semiconductor devices. A holder for the test adapter can be rotated in a defined manner. At least one probe head is provided which can be adjusted radially with respect to the holder. The probe head has two or more contact pins whose spacing distance is adjustable.

Abstract: A test configuration for testing a plurality of integrated circuits, in particular fast semiconductor memory modules located on a wafer, in parallel. The test configuration includes a carrier board for bringing up electrical signal lines belonging to a test system, contact-making needles for producing electrical connections with contact areas on the circuits to be tested, and a plurality of active modules that are arranged on the carrier board. The active modules are each assigned to one of the circuits to be tested in parallel, and are each case inserted into the signal path between the test system and the associated circuit to be tested. In a preferred embodiment, the active modules are arranged at least partly overlapping, based on a direction at right angles to the plane of the carrier board.

Abstract: A method for releasable contact-connection of a plurality of integrated semiconductor modules on a wafer, each of which having a plurality of interconnected supply voltage terminals, includes the steps of providing a contacting card for applying external electrical signals to the semiconductor modules with contact elements for releasable electrical connection to terminal pads of the semiconductor modules, aligning the contacting card with the wafer, producing a releasable contact between terminal pads of the plurality of semiconductor modules and the contact elements of the contacting card, checking the contact quality for each of the semiconductor modules by applying a voltage to at least one of the supply voltage terminals of the semiconductor module through the contacting card, measuring the voltage present at a further one of the supply voltage terminals through the contacting card, and using the measurement result to assess whether or not the semiconductor module has correct contact.

Abstract: A test configuration for testing a plurality of integrated circuits, in particular fast semiconductor memory modules located on a wafer, in parallel. The test configuration includes a carrier board for bringing up electrical signal lines belonging to a test system, contact-making needles for producing electrical connections with contact areas on the circuits to be tested, and a plurality of active modules that are arranged on the carrier board. The active modules are each assigned to one of the circuits to be tested in parallel, and are each case inserted into the signal path between the test system and the associated circuit to be tested. In a preferred embodiment, the active modules are arranged at least partly overlapping, based on a direction at right angles to the plane of the carrier board.

Abstract: A test configuration for testing a plurality of integrated circuits, in particular fast semiconductor memory modules located on a wafer, in parallel. The test configuration includes a carrier board for bringing up electrical signal lines belonging to a test system, contact-making needles for producing electrical connections with contact areas on the circuits to be tested, and a plurality of active modules that are arranged on the carrier board. The active modules are each assigned to one of the circuits to be tested in parallel, and are each case inserted into the signal path between the test system and the associated circuit to be tested. In a preferred embodiment, the active modules are arranged at least partly overlapping, based on a direction at right angles to the plane of the carrier board.

Abstract: A method for rewiring contact pads in the wafer-level package is inventively provided. In order to be able to make the terminals of the characterization pads available for testing in a wafer-level package without these terminals being available later to the end user, the invention provides that the rewiring line is led via the scribe line of the wafer.

Abstract: A method for releasable contact-connection of a plurality of integrated semiconductor modules on a wafer, each of which having a plurality of interconnected supply voltage terminals, includes the steps of providing a contacting card for applying external electrical signals to the semiconductor modules with contact elements for releasable electrical connection to terminal pads of the semiconductor modules, aligning the contacting card with the wafer, producing a releasable contact between terminal pads of the plurality of semiconductor modules and the contact elements of the contacting card, checking the contact quality for each of the semiconductor modules by applying a voltage to at least one of the supply voltage terminals of the semiconductor module through the contacting card, measuring the voltage present at a further one of the supply voltage terminals through the contacting card, and using the measurement result to assess whether or not the semiconductor module has correct contact.

Abstract: A test configuration for testing a plurality of integrated circuits, in particular fast semiconductor memory modules located on a wafer, in parallel. The test configuration includes a carrier board for bringing up electrical signal lines belonging to a test system, contact-making needles for producing electrical connections with contact areas on the circuits to be tested, and a plurality of active modules that are arranged on the carrier board. The active modules are each assigned to one of the circuits to be tested in parallel, and are each case inserted into the signal path between the test system and the associated circuit to be tested. In a preferred embodiment, the active modules are arranged at least partly overlapping, based on a direction at right angles to the plane of the carrier board.

Abstract: The apparatus enables the automated testing, calibration and characterization of test adapters for semiconductor devices. A holder for the test adapter can be rotated in a defined manner. At least one probe head is provided which can be adjusted radially with respect to the holder. The probe head has two or more contact pins whose spacing distance is adjustable.

Abstract: This invention is directed to a vehicle structure that provides for flexible seat rearrangement capability in which the second of two rows of tandem, rotatable seats are mounted on rails. The rails for one of the second rows of seats are parallel with the longitudinal axis of the vehicle. The rails for the other of the second row seats extend across the vehicle at an angle of about 60.degree. to the vehicle's longitudinal axis. These angularly disposed rails, moreover, extend to the front of the longitudinal rails.

Abstract: New gona-4,9(10)-dienes of formula I ##STR1## where R is alkyl of 1 to 3 carbon atoms and X is Cl, Br, F, N.sub.3, SCN, CN, OH, OR'(R'-alkyl), NH.sub.2, a substituted amino group or a heterocyclic compound including nitrogen in the ring. The compounds have valuable biological properties, especially hormonal and antihormonal effects, and can be used to advantage in pharmaceutical preparation, for the treatment of endocrinopathies and for reproduction control in human beings and livestock.The invention also embraces a process for making the compounds by converting 3-methoxy-13.beta.-R-gona-2,5(10)-diene-17.beta.-spiro-1,`2`-ox iranes to 17.beta.-hydroxy-17.alpha.-CH.sub.2 -13.beta.-R-gona-4,9(10)-diene-3-ones to the 17.alpha.-CH.sub.2 X-14.beta.-ols which are hydrolyzed to the 17.beta.-OH which latter are then converted to the compounds of formula I.

Abstract: New gona-4,9(10)-dienes of formula I ##STR1## where R is alkyl of 1 to 3 carbon atoms and X is Cl, Br, F, N.sub.3, SCN, CN, OH, OR'(R'=alkyl), NH.sub.2, a substituted amino group or a heterocyclic compound including nitrogen in the ring. The compounds have valuable biological properties, especially hormonal and antihormonal effects, and can be used to advantage in pharmaceutical preparations for the treatment of endocrinopathies and for reproduction control in human beings and livestock.The invention also embraces a process for making the compounds by converting 3-methyoxy-13.beta.-R-gona-2,5(10)-diene-17.beta.-spiro-1',2'-o xiranes first to 17.beta.-hydroxy-17.alpha.-CH.sub.2 X-13.beta.-R-gon-5(10)-en-3-one, then to the 17.beta.-hydroxy-17.alpha.-CH.sub.2 X-13.beta.-R-gona-4,9(10)-diene-3-ones of formula I.