Abstract: A clarifying radio receiver has a charge transfer device filter which is coupled to receive input signals consisting of a plurality of frequency bands lying respectively within a plurality of non-overlapping frequency channels. The filter simultaneously receives clocking signals, and has a plurality of spaced apart passbands which shift in frequency dependent upon the frequency of the clocking signals. Clocking means generate the clocking signals with an incrementally adjustable frequency. The increments are smaller than the width of the channels thereby permitting a selected one of the filter passbands to be precisely aligned about a fixed reference frequency.

Abstract: An electronic phase detector circuit includes a variable period sawtooth generator. The sawtooth generator receives digital reference clock signals and in response thereto generates sawtooth-shaped signals having the same period as said reference clock signals. A sample and hold circuit samples the sawtooth-shaped signals in response to one logical state of a sampling clock. A voltage controlled oscillator is coupled to the output of the sample and hold circuit and oscillates at a frequency proportional to the magnitude of the held sample.

Abstract: An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is implemented with a semiconductor chip having a hexadecimal/binary coded decimal format arithmetic unit for performing arithmetic operations on numeric data inputted by the keyboard further, the system preferably includes an input, an address register responsive to the input, a instruction word memory for storing a number of instruction words and addressable in response to the address stored in the address register, and instruction word decoder logic for decoding instruction words outputted from the instruction word memory and for controlling the arithmetic unit in response thereto. The arithmetic unit is operable in a first mode for providing an output from the arithmetic unit in binary coded decimal format and in a second mode providing an output from the arithmetic unit in hexadecimal format.

Abstract: An alphanumeric display system which may be implemented on one or more semiconductor chips for controlling display devices arrayed in N groups, each group of which comprises an A by B matrix of devices and which is capable of displaying a single alphanumeric character. The display devices in each group are sequentially addressed with display commands being communicated therewith in a predetermined manner to cause the display devices to visually display a predetermined alphanumeric character. Use of the alphanumeric display system herein disclosed, permits a total of A by B by N display devices to be controlled by the display system using as few as A + B + N connecting conductors to control the display devices and associated display driver devices.

Abstract: A selectively alterable base numerical system in which a calculator implemented in a few semiconductor chips has a keyboard to enter numeric data and to command functions to be performed on the data by circuitry on the semiconductor chips in a first number base. The results of operations on the data in accordance with a selected function are then available as by way of a display. Circuitry is provided responsive to a keyboard base function input to change the results between number bases, preferably between hexadecimal, octal and decimal. A three chip calculator is provided where a data chip cooperates with two ROM chips and a manual keyboard input unit to permit operation selectively in any of several number bases and to change between bases at any point in a course of operations.

Abstract: A user programmable calculator includes a keyboard, output display means and logic circuitry which generates to the output display means a prompting message indication of the type of data or function entry which the system's operative program, which may be a user stored program, next expects. The keyboard includes a special set of response keys in addition to the numerical and function keys normally incorporated on calculator systems. The special keys facilitate responding to data functional information requests by the calculator. The calculator may be programmed by the user to perform a series of functions upon data entries by entering a series of program steps from the keyboard or from a storage media such as magnetic card, paper tape or the like. The program steps which contain the prompting messages are stored in registers of the calculator system.

Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, digit and FLAG mask decoders, key input logic, a register and FLAG data storage array, a decimal and FLAG arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.

Abstract: A pair of input field effect transistors are arranged as a differential pair having an electrode of each connected in common and connected in turn to a circuit common by means of a third field effect transistor. A pair of output field effect transistors are coupled to the input field effect transistors and have an electrode of each connected in common and coupled to the gate of the third field effect transistor, thereby providing an amplifier which relatively insensitive to change in the threshold voltage of the field effect transistors.

Abstract: A calculator system, implemented on at least one semiconductor chip and having a read-only-memory for storing a plurality of program instructions, has a multi-function memory instruction register. The instruction register has a parallel input for receiving a selected program instruction from the memory, and preferably a parallel output for transmitting the program instruction to a decoder. The instruction register also has a serial output connected to a buffer. The memory is addressed by an address register which also provides a code indicative of whether or not the addressed program instruction is to control the calculator system. When the addressed program instruction is to control the system, the code has preselected setting and the program instruction is read out of the instruction register through the buffer and is sequentially serially re-entered into the instruction register via a serial input. Thereafter, the program instruction is read out of the instruction register to be decoded by the decoder.

Abstract: This invention relates to enhancement of calculator versatility through connections provided in a calculator cradle leading to a printing mechanism therein when a calculator is nested in the cradle. In a more specific aspect, the invention relates to the communication between a calculator and a printer module which nests the calculator and responds to instructions and data flow from the calculator to print selected calculator information.

Abstract: A thermal line printer includes a semiconductor chip for control of A .times. N heaters arrayed in N groups past which thermally sensitive paper is stepped B times in printing a line of characters in an A .times. B dot matrix. A sequential access memory stores N multibit words, one word for each character to be printed on a given line with a commutator cyclically to read words from the memory A .times. B times for each line to be printed. A ROM has an A .times. B dot matrix code therein for each available character. A time sequencer and decoder connected to the ROM is synchronized with the commutator to produce a different one bit output from the ROM each time each given word is read from memory. A set of N enable circuits leads from the ROM to N groups of heaters. A set of A enable circuits leads from the sequencer to A groups of heaters where one heater in each A group is from one of the N groups.

Abstract: A method of assembling, positioning, and making connections to a thermal printhead is disclosed. A substrate is provided upon which heating elements or mesas are mounted. Leads from these heating elements are continued on the same side of the substrate as the one on which the elements are located. The leads are brought to terminal pads where connections may be made to the logic circuit which selectively energizes the heating elements to form numerals or characters on heat sensitive paper. A flat flexible cable with conductor ends exposed is held in place so that the exposed conductor ends make contact with the terminal pads of one or more of such substrates. The substrates and cable are clamped together by two metal plates. This entire assembly is mounted on a spring-loaded pivot arrangement so as to hold the heating elements against the heat sensitive paper on an advancing platen. Connections may be made between the cable conductors and the printing logic to allow the heating elements to be energized.

Abstract: An electronic portable calculator implemented in MOS/LSI technology and including a scanned keyboard input and display output. The calculator system utilizes a plurality of output terinals on the primary MOS/LSI chip for selectively addressing in timed coded sequence an array of peripheral MOS/LSI chips providing for expanded register and memory capacity and for output printing. Data registers are provided in a sequentially addressed random access memory array, which is addressed by a commutator also used to generate encoded timing signals for other parts of the system and control logic. The keyboard input includes an interface register into which is entered key sense line information along with encoded timing information derived from the encoded timing signals. The contents of the interface register may be entered into the data registers or used to select an address in a program storage memory via a program counter.

Abstract: Disclosed is a self-contained data processing unit, preferably a calculator, which includes an output indicator directing the user which data or function entry the system next expects. After initial data and function entries, a permanent store memory generates successive coded representations of the next entry expected. These representations are visually indicated to the user by an output indicator such as a printer, light emitting diodes, or gas discharge tubes allowing the user to input in proper sequence a long series of inputs without referring to a user's guide.

Abstract: Disclosed is an expandable calculator system of the type implemented on semiconductor chips and featuring additional data storage registers for increasing data storage capacity of the basic system. A basic calculator system comprising two semiconductor chips is provided with additional semiconductor chips each providing a plurality of separately addressable registers for storing data, to thereby increase the data storage capacity of the two-chip system. Ten registers are desirably provided per external chip, and a novel method of addressing particular external register chips and particular registers therein is utilized. First and second signals synchronize the internal timing of the external register chips and also enable communication to the external chips. After the external register chip has been enabled, the appropriate memory is addressed via the same lines on which the data is subsequently transmitted to the memory.

Abstract: Control of a drum printer by signals from an LSI/MOS calculator chip. Drum generated signals and control signals generated on a second LSI/MOS chip operating in synchronism with the calculator chip selectively provide for actuation of a line of print hammers.Further, two channels coupling the calculator chip to the control chip provide for flow of coded character words and function words for printing of both functions and characters on a given line.Further, control of the printer is accomplished by observing which digit time in the calculator chip a specific dedicated flag is set.

Abstract: Disclosed is a calculator having a basic pair of semiconductor chips respectively providing memory and computational functions and a third chip in combination therewith providing additional register and memory capacity. The basic chip pair generates system timing signals, flag signals and control signals which address the registers on the third chip and allow data to be written there into via the input/output data lines and data to be read therefrom via the input/output lines. The specific functions are effected upon the occurrence of the flag signal concurrently with a preselected timing signal.